From 8403c0dc750a1a92c987a104462dc48f1bbd20dd Mon Sep 17 00:00:00 2001 From: Hauke Mehrtens Date: Thu, 20 Sep 2012 14:51:57 +0000 Subject: [brcm47xx]: deactivate mips wait instruction for MIPS 74K on Broadcom SoCs When not removing support for the wait instruction, when ruining on the BCM4706 SoC the system stops after msleep() without an exception. I haven't seen this problem on the other Broadcom SoCs with a 74K CPU, but in the Broadcom SDK it is deactivated for all CPUs of this type. git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33496 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- target/linux/brcm47xx/patches-3.3/170-fix-74k-cpu.patch | 12 ++++++++++++ 1 file changed, 12 insertions(+) create mode 100644 target/linux/brcm47xx/patches-3.3/170-fix-74k-cpu.patch (limited to 'target/linux') diff --git a/target/linux/brcm47xx/patches-3.3/170-fix-74k-cpu.patch b/target/linux/brcm47xx/patches-3.3/170-fix-74k-cpu.patch new file mode 100644 index 0000000000..6eee89532b --- /dev/null +++ b/target/linux/brcm47xx/patches-3.3/170-fix-74k-cpu.patch @@ -0,0 +1,12 @@ +--- a/arch/mips/kernel/cpu-probe.c ++++ b/arch/mips/kernel/cpu-probe.c +@@ -209,9 +209,6 @@ void __init check_wait(void) + break; + + case CPU_74K: +- cpu_wait = r4k_wait; +- if ((c->processor_id & 0xff) >= PRID_REV_ENCODE_332(2, 1, 0)) +- cpu_wait = r4k_wait_irqoff; + break; + + case CPU_TX49XX: -- cgit v1.2.3