From d0d3be5d8287ff737cfe4381c44706f1d8f7b881 Mon Sep 17 00:00:00 2001 From: Zoltan HERPAI Date: Wed, 27 Aug 2014 12:09:46 +0000 Subject: sunxi: initial 3.14 patchset Signed-off-by: Zoltan HERPAI git-svn-id: svn://svn.openwrt.org/openwrt/trunk@42313 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- ...-sunxi-add-support-for-usb-clockreg-reset.patch | 133 +++++++++++++++++++++ 1 file changed, 133 insertions(+) create mode 100644 target/linux/sunxi/patches-3.14/182-clk-sunxi-add-support-for-usb-clockreg-reset.patch (limited to 'target/linux/sunxi/patches-3.14/182-clk-sunxi-add-support-for-usb-clockreg-reset.patch') diff --git a/target/linux/sunxi/patches-3.14/182-clk-sunxi-add-support-for-usb-clockreg-reset.patch b/target/linux/sunxi/patches-3.14/182-clk-sunxi-add-support-for-usb-clockreg-reset.patch new file mode 100644 index 0000000000..533b6013f1 --- /dev/null +++ b/target/linux/sunxi/patches-3.14/182-clk-sunxi-add-support-for-usb-clockreg-reset.patch @@ -0,0 +1,133 @@ +From 0643a93746775da2189ab0afd8f748afcaa791c5 Mon Sep 17 00:00:00 2001 +From: Hans de Goede +Date: Fri, 7 Feb 2014 16:21:49 +0100 +Subject: [PATCH] clk: sunxi: Add support for USB clock-register reset bits +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The usb-clk register is special in that it not only contains clk gate bits, +but also has a few reset bits. This commit adds support for this by allowing +gates type sunxi clks to also register a reset controller. + +Signed-off-by: Hans de Goede +Acked-by: Philipp Zabel +Acked-by: Maxime Ripard +Signed-off-by: Emilio López +--- + drivers/clk/sunxi/clk-sunxi.c | 71 +++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 71 insertions(+) + +diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c +index 736fb60..23beb6e 100644 +--- a/drivers/clk/sunxi/clk-sunxi.c ++++ b/drivers/clk/sunxi/clk-sunxi.c +@@ -18,6 +18,7 @@ + #include + #include + #include ++#include + + #include "clk-factors.h" + +@@ -688,6 +689,59 @@ static void __init sunxi_divider_clk_setup(struct device_node *node, + + + /** ++ * sunxi_gates_reset... - reset bits in leaf gate clk registers handling ++ */ ++ ++struct gates_reset_data { ++ void __iomem *reg; ++ spinlock_t *lock; ++ struct reset_controller_dev rcdev; ++}; ++ ++static int sunxi_gates_reset_assert(struct reset_controller_dev *rcdev, ++ unsigned long id) ++{ ++ struct gates_reset_data *data = container_of(rcdev, ++ struct gates_reset_data, ++ rcdev); ++ unsigned long flags; ++ u32 reg; ++ ++ spin_lock_irqsave(data->lock, flags); ++ ++ reg = readl(data->reg); ++ writel(reg & ~BIT(id), data->reg); ++ ++ spin_unlock_irqrestore(data->lock, flags); ++ ++ return 0; ++} ++ ++static int sunxi_gates_reset_deassert(struct reset_controller_dev *rcdev, ++ unsigned long id) ++{ ++ struct gates_reset_data *data = container_of(rcdev, ++ struct gates_reset_data, ++ rcdev); ++ unsigned long flags; ++ u32 reg; ++ ++ spin_lock_irqsave(data->lock, flags); ++ ++ reg = readl(data->reg); ++ writel(reg | BIT(id), data->reg); ++ ++ spin_unlock_irqrestore(data->lock, flags); ++ ++ return 0; ++} ++ ++static struct reset_control_ops sunxi_gates_reset_ops = { ++ .assert = sunxi_gates_reset_assert, ++ .deassert = sunxi_gates_reset_deassert, ++}; ++ ++/** + * sunxi_gates_clk_setup() - Setup function for leaf gates on clocks + */ + +@@ -695,6 +749,7 @@ static void __init sunxi_divider_clk_setup(struct device_node *node, + + struct gates_data { + DECLARE_BITMAP(mask, SUNXI_GATES_MAX_SIZE); ++ u32 reset_mask; + }; + + static const struct gates_data sun4i_axi_gates_data __initconst = { +@@ -765,6 +820,7 @@ static void __init sunxi_gates_clk_setup(struct device_node *node, + struct gates_data *data) + { + struct clk_onecell_data *clk_data; ++ struct gates_reset_data *reset_data; + const char *clk_parent; + const char *clk_name; + void *reg; +@@ -808,6 +864,21 @@ static void __init sunxi_gates_clk_setup(struct device_node *node, + clk_data->clk_num = i; + + of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); ++ ++ /* Register a reset controler for gates with reset bits */ ++ if (data->reset_mask == 0) ++ return; ++ ++ reset_data = kzalloc(sizeof(*reset_data), GFP_KERNEL); ++ if (!reset_data) ++ return; ++ ++ reset_data->reg = reg; ++ reset_data->lock = &clk_lock; ++ reset_data->rcdev.nr_resets = __fls(data->reset_mask) + 1; ++ reset_data->rcdev.ops = &sunxi_gates_reset_ops; ++ reset_data->rcdev.of_node = node; ++ reset_controller_register(&reset_data->rcdev); + } + + +-- +2.0.3 + -- cgit v1.2.3