From 870678baa7f8b9a65945237704d84d7724f42459 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 20 Jun 2016 15:28:36 +0200 Subject: target: socfpga: Add support for QSPI NOR boot Add necessary kernel backports to support the Cadence QSPI controller present on the Altera SoCFPGA SoC. Signed-off-by: Marek Vasut --- ...on-atmel-quadspi-add-binding-file-for-Atm.patch | 58 ++++++++++++++++++++++ 1 file changed, 58 insertions(+) create mode 100644 target/linux/socfpga/patches-4.4/0029-Documentation-atmel-quadspi-add-binding-file-for-Atm.patch (limited to 'target/linux/socfpga/patches-4.4/0029-Documentation-atmel-quadspi-add-binding-file-for-Atm.patch') diff --git a/target/linux/socfpga/patches-4.4/0029-Documentation-atmel-quadspi-add-binding-file-for-Atm.patch b/target/linux/socfpga/patches-4.4/0029-Documentation-atmel-quadspi-add-binding-file-for-Atm.patch new file mode 100644 index 0000000000..ca8831d15a --- /dev/null +++ b/target/linux/socfpga/patches-4.4/0029-Documentation-atmel-quadspi-add-binding-file-for-Atm.patch @@ -0,0 +1,58 @@ +From 771ee7cd27c39617ece8727c70f904c31f7415fb Mon Sep 17 00:00:00 2001 +From: Cyrille Pitchen +Date: Fri, 8 Jan 2016 17:10:55 +0100 +Subject: [PATCH 29/33] Documentation: atmel-quadspi: add binding file for + Atmel QSPI driver + +This patch documents the DT bindings for the driver of the Atmel QSPI +controller embedded inside sama5d2x SoCs. + +Signed-off-by: Cyrille Pitchen +Acked-by: Rob Herring +Acked-by: Nicolas Ferre +--- + .../devicetree/bindings/mtd/atmel-quadspi.txt | 32 ++++++++++++++++++++++ + 1 file changed, 32 insertions(+) + create mode 100644 Documentation/devicetree/bindings/mtd/atmel-quadspi.txt + +diff --git a/Documentation/devicetree/bindings/mtd/atmel-quadspi.txt b/Documentation/devicetree/bindings/mtd/atmel-quadspi.txt +new file mode 100644 +index 0000000..4898070 +--- /dev/null ++++ b/Documentation/devicetree/bindings/mtd/atmel-quadspi.txt +@@ -0,0 +1,32 @@ ++* Atmel Quad Serial Peripheral Interface (QSPI) ++ ++Required properties: ++- compatible: Should be "atmel,sama5d2-qspi". ++- reg: Should contain the locations and lengths of the base registers ++ and the mapped memory. ++- reg-names: Should contain the resource reg names: ++ - qspi_base: configuration register address space ++ - qspi_mmap: memory mapped address space ++- interrupts: Should contain the interrupt for the device. ++- clocks: The phandle of the clock needed by the QSPI controller. ++- #address-cells: Should be <1>. ++- #size-cells: Should be <0>. ++ ++Example: ++ ++spi@f0020000 { ++ compatible = "atmel,sama5d2-qspi"; ++ reg = <0xf0020000 0x100>, <0xd0000000 0x8000000>; ++ reg-names = "qspi_base", "qspi_mmap"; ++ interrupts = <52 IRQ_TYPE_LEVEL_HIGH 7>; ++ clocks = <&spi0_clk>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_spi0_default>; ++ status = "okay"; ++ ++ m25p80@0 { ++ ... ++ }; ++}; +-- +2.8.1 + -- cgit v1.2.3