From ea9d630f96ea738d999763ac97e1e7055f2ed3dd Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Mon, 25 May 2015 21:15:37 +0000 Subject: mpc85xx: TL-WDR4900: Fix port 6 being shown as up (10MBit/half) in LUCI/swconfig Currently port 6 is shown as up 10MBit/half in LUCI and swconfig. Reason is that all bits in the port 6 config are zero. This means that also the aneg flag is not set and in this case ar8216_read_port_link hardcodes the link to be up. This is no real problem but a little annoying. To fix this initialize port 6 with the aneg bit enabled. This causes ar8216_read_port_link to evaluate the link status bit which is always zero for port 6 as no PHY is connected to this port. And it doesn't hurt as port 6 isn't connected to anything on TL-WDR4900. Signed-off-by: Heiner Kallweit git-svn-id: svn://svn.openwrt.org/openwrt/trunk@45749 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts | 1 + 1 file changed, 1 insertion(+) (limited to 'target/linux/mpc85xx/files/arch/powerpc/boot') diff --git a/target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts index 7e48e23e4f..2beb39cf1f 100644 --- a/target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts +++ b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts @@ -103,6 +103,7 @@ 0x00058 0xcf35cf35 /* LED_CTRL2 */ 0x0005c 0x03ffff00 /* LED_CTRL3 */ 0x0007c 0x0000007e /* PORT0_STATUS */ + 0x00094 0x00000200 /* PORT6_STATUS */ >; }; }; -- cgit v1.2.3