From c73005f2890ce6129f923a07bf8ed03894f72fea Mon Sep 17 00:00:00 2001 From: Jonas Gorski Date: Mon, 1 Dec 2014 00:52:07 +0000 Subject: brcm63xx: register interrupt-controllers through DT when possible Add the required nodes for the interrupt controllers and register them through DT when a DTB is present. Signed-off-by: Jonas Gorski git-svn-id: svn://svn.openwrt.org/openwrt/trunk@43457 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- target/linux/brcm63xx/dts/bcm6338.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) (limited to 'target/linux/brcm63xx/dts/bcm6338.dtsi') diff --git a/target/linux/brcm63xx/dts/bcm6338.dtsi b/target/linux/brcm63xx/dts/bcm6338.dtsi index 9746e7a4fd..b527781060 100644 --- a/target/linux/brcm63xx/dts/bcm6338.dtsi +++ b/target/linux/brcm63xx/dts/bcm6338.dtsi @@ -18,6 +18,14 @@ }; }; + cpu_intc: interrupt-controller { + #address-cells = <0>; + compatible = "mti,cpu-interrupt-controller"; + + interrupt-controller; + #interrupt-cells = <1>; + }; + memory { device_type = "memory"; reg = <0 0>; }; pflash: nor@1fc00000 { @@ -35,5 +43,27 @@ #size-cells = <1>; ranges; compatible = "simple-bus"; + + periph_intc: interrupt-controller@fffe000c { + compatible = "brcm,bcm6345-l2-intc"; + reg = <0xfffe000c 0x8>; + + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&cpu_intc>; + interrupts = <2>; + }; + + ext_intc: interrupt-controller@fffe0014 { + compatible = "brcm,bcm6345-ext-intc"; + reg = <0xfffe0014 0x4>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupt-parent = <&cpu_intc>; + interrupts = <3>, <4>, <5>, <6>; + }; }; }; -- cgit v1.2.3