From 397e584bfb4b01b1bbc6d2f8cba4d82a8ddf4657 Mon Sep 17 00:00:00 2001 From: Gabor Juhos Date: Fri, 20 Dec 2013 11:41:22 +0000 Subject: ar71xx: ag71xx: fix max frame length setup of the built-in switches The currently used bitmask of the maximum frame length field is wrong for both models. On AR724x/AR933x the largest frame size is 2047 bytes, on the AR934x it is 16383 bytes. Make the MTU setup code model specific, and use the correct bitmask for both models. Also change the value to the maximum. Signed-off-by: Gabor Juhos git-svn-id: svn://svn.openwrt.org/openwrt/trunk@39148 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- .../drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) (limited to 'target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx') diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c index 3fa6cca36a..d4ccc02eb4 100644 --- a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c +++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c @@ -36,7 +36,8 @@ #define AR7240_FLOOD_MASK_BROAD_TO_CPU BIT(26) #define AR7240_REG_GLOBAL_CTRL 0x30 -#define AR7240_GLOBAL_CTRL_MTU_M BITM(12) +#define AR7240_GLOBAL_CTRL_MTU_M BITM(11) +#define AR9340_GLOBAL_CTRL_MTU_M BITM(14) #define AR7240_REG_VTU 0x0040 #define AR7240_VTU_OP BITM(3) @@ -586,6 +587,11 @@ static void ar7240sw_setup(struct ar7240sw *as) AR934X_FLOOD_MASK_BC_DP(0) | AR934X_FLOOD_MASK_MC_DP(0)); + /* setup MTU */ + ar7240sw_reg_rmw(mii, AR7240_REG_GLOBAL_CTRL, + AR9340_GLOBAL_CTRL_MTU_M, + AR9340_GLOBAL_CTRL_MTU_M); + /* Enable MIB counters */ ar7240sw_reg_set(mii, AR7240_REG_MIB_FUNCTION0, AR934X_MIB_ENABLE); @@ -601,11 +607,12 @@ static void ar7240sw_setup(struct ar7240sw *as) /* Enable Broadcast frames transmitted to the CPU */ ar7240sw_reg_set(mii, AR7240_REG_FLOOD_MASK, AR7240_FLOOD_MASK_BROAD_TO_CPU); - } - /* setup MTU */ - ar7240sw_reg_rmw(mii, AR7240_REG_GLOBAL_CTRL, AR7240_GLOBAL_CTRL_MTU_M, - 1536); + /* setup MTU */ + ar7240sw_reg_rmw(mii, AR7240_REG_GLOBAL_CTRL, + AR7240_GLOBAL_CTRL_MTU_M, + AR7240_GLOBAL_CTRL_MTU_M); + } /* setup Service TAG */ ar7240sw_reg_rmw(mii, AR7240_REG_SERVICE_TAG, AR7240_SERVICE_TAG_M, 0); -- cgit v1.2.3