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* Revert "ar71xx: Allow to set the RXDV, RXD, TXD, TXE delays for QCA955x"John Crispin2016-03-231-1/+1
| | | | | | | | | | | | The default delays RXD 3. RDV 3, TXD 0, TXE 0 doesn't seem to work for some boards. These boards depend on the preset values of u-boot which may differ. This reverts commit f2d4bb96b62512caa161dcc2867c91692fb16a38. Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@49071 3c298f89-4303-0410-b956-a3cf2f4a3e73
* ar71xx: Allow to set the RXDV, RXD, TXD, TXE delays for QCA955xJohn Crispin2016-03-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some u-boot versions for QCA955x change the delays based on the link speed during boot. This usually breaks the support of other linkspeeds when OpenWrt is booted. It also conflicts with the at803x_platform_data::fixup_rgmii_tx_delay. OpenWrt has to set its own values in QCA955X_GMAC_REG_ETH_CFG. The default RGMII values from the Atheros u-boot are currently used to preset the existing mach files. These may have to be adjusted for boards using different values but which are not currently set them explicitely in OpenWrt. Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com> Cc: Gabor Juhos <juhosg@openwrt.org> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: Christian Beier <cb@shoutrlabs.com> Cc: Chris R Blake <chrisrblake93@gmail.com> Cc: Benjamin Berg <benjamin@sipsolutions.net> Cc: Heiner Kallweit <hkallweit1@gmail.com> Cc: Cezary Jackiewicz <cezary.jackiewicz@gmail.com> Cc: Matthias Schiffer <mschiffer@universe-factory.net> Cc: Dirk Neukirchen <dirkneukirchen@web.de> Cc: Christian Mehlis <christian@m3hlis.de> Cc: Luka Perkov <luka@openwrt.org> Cc: Felix Fietkau <nbd@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@49029 3c298f89-4303-0410-b956-a3cf2f4a3e73
* ar8216: rework/fix AR8337 MAC swap handlingFelix Fietkau2015-12-201-1/+0
| | | | | | | | | | | | | | In r45970 the MAC swap handling was made opt-in, however some boards have been forgotten during the conversion. Since the reference design uses this MAC swapping, and pretty much all known boards using this chip seem to do so too, enabling the swapping is a more reasonable default than leaving it disabled. Change the code to still allow boards to opt-out of this. Signed-off-by: Felix Fietkau <nbd@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@47956 3c298f89-4303-0410-b956-a3cf2f4a3e73
* ar8216: Fix problem with AR8337 MAC swap handlingFelix Fietkau2015-06-141-0/+1
| | | | | | | | | | | | | | | | | | | | | AR8337 supports a configuration bit to swap MAC0 and MAC6. Currently this is set in general if an AR8337 is detected and causes issues with devices using an AR8334 (internally an AR8337, just less chip pins). And it might even cause issues with AR8337-based devices with different board designs. Swapping the MAC's however isn't needed for AR8337 in general. It's just needed in case of certain board designs (affected devices seem to be based on Atheros reference board AP135/136-010). Therefore this configuration bit should be moved to platform data. The patch includes the needed changes to the device initialization code of affected devices. Hopefully I didn't miss any .. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@45970 3c298f89-4303-0410-b956-a3cf2f4a3e73
* [ar71xx]: Belkin AC 1750 DB (F9K1115v2) supportImre Kaloz2014-12-171-0/+189
Signed-off-by: Imre Kaloz <kaloz@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@43734 3c298f89-4303-0410-b956-a3cf2f4a3e73