summaryrefslogtreecommitdiffstats
path: root/target/linux/ramips/dts/WIZFI630A.dts
blob: 0f7ede54dfdc760062bca77dd7b8737f5e54b643 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
/dts-v1/;

#include "rt5350.dtsi"

/ {
	compatible = "wizfi630a", "ralink,rt5350-soc";
	model = "WIZnet WizFi630A";

	chosen {
		bootargs = "console=ttyS1,115200";
	};

	gpio-export {
		compatible = "gpio-export";
		#size-cells = <0>;
	};

	gpio-leds {
		compatible = "gpio-leds";

		run {
			label = "wizfi630a::run";
			gpios = <&gpio0 1 1>;
		};

		wps {
			label = "wizfi630a::wps";
			gpios = <&gpio0 20 1>;
		};

		uart1 {
			label = "wizfi630a::uart1";
			gpios = <&gpio0 18 1>;
		};

		uart2 {
			label = "wizfi630a::uart2";
			gpios = <&gpio0 21 1>;
		};
	};

	gpio-keys-polled {
		compatible = "gpio-keys-polled";
		#address-cells = <1>;
		#size-cells = <0>;
		poll-interval = <20>;

		reset {
			label = "reset";
			gpios = <&gpio0 17 1>;
			linux,code = <0x198>;
		};

		wps {
			label = "wps";
			gpios = <&gpio0 0 1>;
			linux,code = <0x211>;
		};
		
		scm1 {
			label = "SCM1";
			gpios = <&gpio0 19 1>;
			linux,code = <0x100>;
		};

		scm2 {
			label = "SCM2";
			gpios = <&gpio0 2 1>;
			linux,code = <0x101>;
		};
	};
};

&gpio1 {
	status = "okay";
};

&spi0 {
	status = "okay";

	m25p80@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "jedec,spi-nor";
		reg = <0>;
		linux,modalias = "m25p80", "w25q128";
		spi-max-frequency = <10000000>;

		partition@0 {
			#size-cells = <1>;
			label = "uboot";
			reg = <0x0 0x30000>;
			read-only;
		};

		partition@30000 {
			#size-cells = <1>;
			label = "uboot-env";
			reg = <0x30000 0x10000>;
			read-only;
		};

		factory: partition@40000 {
			#size-cells = <1>;
			label = "factory";
			reg = <0x40000 0x10000>;
			read-only;
		};

		partition@50000 {
			#size-cells = <1>;
			label = "firmware";
			reg = <0x50000 0xfb0000>;
		};
	};
};

&uart {
	compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
	reg = <0x500 0x100>;
	resets = <&rstctrl 12>;
	reset-names = "uart";
	interrupt-parent = <&intc>;
	interrupts = <5>;
	reg-shift = <2>;
	pinctrl-names = "default";
	pinctrl-0 = <&uartf_pins>;
	status = "okay";
};

&uartlite {
	compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
	reg = <0xc00 0x100>;
	resets = <&rstctrl 19>;
	reset-names = "uartl";
	interrupt-parent = <&intc>;
	interrupts = <12>;
	reg-shift = <2>;
	pinctrl-names = "default";
	pinctrl-0 = <&uartlite_pins>;
};

&pinctrl {
	state_default: pinctrl0 {
		gpio {
			ralink,group = "i2c", "jtag" ;
			ralink,function = "gpio";
		};
	};

	uartf_gpio_pins: uartf_gpio {
		uartf_gpio {
			ralink,group = "uartf";
			ralink,function = "uartf";
		};
	};

	uartlite_pins: uartlite {
		uart {
			ralink,group = "uartlite";
			ralink,function = "uartlite";
		};
	};
};

&ethernet {
	mtd-mac-address = <&factory 0x4>;
};

&esw {
	mediatek,portmap = <0x17>;
};

&wmac {
	ralink,mtd-eeprom = <&factory 0>;
};

&ehci {
	status = "okay";
};

&ohci {
	status = "okay";
};