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From 503e2c16e21b49e912bcbe6af5cda34b65e30502 Mon Sep 17 00:00:00 2001
From: Jes Sorensen <Jes.Sorensen@redhat.com>
Date: Tue, 30 Aug 2016 17:23:35 -0400
Subject: [PATCH] rtl8xxxu: Correct power down sequence for 8188eu
This matches the vendor driver more correctly
Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com>
---
.../net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188e.c | 26 ++++++++++++++++------
1 file changed, 19 insertions(+), 7 deletions(-)
--- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188e.c
+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188e.c
@@ -1083,7 +1083,8 @@ static void rtl8188e_disabled_to_emu(str
u16 val16;
val16 = rtl8xxxu_read16(priv, REG_APS_FSMCO);
- val16 &= ~(APS_FSMCO_PFM_WOWL | APS_FSMCO_ENABLE_POWERDOWN);
+ val16 &= ~(APS_FSMCO_PFM_WOWL | APS_FSMCO_ENABLE_POWERDOWN |
+ APS_FSMCO_HW_POWERDOWN);
rtl8xxxu_write16(priv, REG_APS_FSMCO, val16);
}
@@ -1196,15 +1197,26 @@ static int rtl8188eu_emu_to_disabled(str
{
u8 val8;
- /* 0x04[12:11] = 01 enable WL suspend */
- val8 = rtl8xxxu_read8(priv, REG_APS_FSMCO + 2);
- val8 &= ~BIT(0);
- rtl8xxxu_write8(priv, REG_APS_FSMCO + 2, val8);
+ val8 = rtl8xxxu_read8(priv, REG_AFE_XTAL_CTRL + 2);
+ val8 |= BIT(7);
+ rtl8xxxu_write8(priv, REG_AFE_XTAL_CTRL + 2, val8);
val8 = rtl8xxxu_read8(priv, REG_APS_FSMCO + 1);
- val8 |= BIT(7);
+ val8 &= ~(BIT(3) | BIT(4));
+ val8 |= BIT(3);
rtl8xxxu_write8(priv, REG_APS_FSMCO + 1, val8);
+ rtl8xxxu_write8(priv, REG_APS_FSMCO + 3, 0x00);
+
+ val8 = rtl8xxxu_read8(priv, REG_GPIO_MUXCFG + 1);
+ val8 &= ~BIT(4);
+ rtl8xxxu_write8(priv, REG_GPIO_MUXCFG + 1, val8);
+
+ /* Set USB suspend enable local register 0xfe10[4]=1 */
+ val8 = rtl8xxxu_read8(priv, 0xfe10);
+ val8 |= BIT(4);
+ rtl8xxxu_write8(priv, 0xfe10, val8);
+
return 0;
}
@@ -1339,7 +1351,7 @@ void rtl8188eu_power_off(struct rtl8xxxu
rtl8xxxu_write8(priv, REG_GPIO_PIN_CTRL + 2, 0xff);
val8 = rtl8xxxu_read8(priv, REG_GPIO_IO_SEL);
- rtl8xxxu_write8(priv, REG_GPIO_IO_SEL + 1, val8 << 4);
+ rtl8xxxu_write8(priv, REG_GPIO_IO_SEL, val8 << 4);
val8 = rtl8xxxu_read8(priv, REG_GPIO_IO_SEL + 1);
rtl8xxxu_write8(priv, REG_GPIO_IO_SEL + 1, val8 | 0x0f);
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