--- a/arch/mips/ralink/Kconfig +++ b/arch/mips/ralink/Kconfig @@ -52,6 +52,8 @@ choice select SYS_SUPPORTS_SMP select SYS_SUPPORTS_MIPS_CPS select MIPS_GIC + select COMMON_CLK + select CLKSRC_MIPS_GIC select HW_HAS_PCI endchoice --- a/arch/mips/ralink/Makefile +++ b/arch/mips/ralink/Makefile @@ -6,14 +6,18 @@ # Copyright (C) 2009-2011 Gabor Juhos # Copyright (C) 2013 John Crispin -obj-y := prom.o of.o reset.o clk.o timer.o +obj-y := prom.o of.o reset.o + +ifndef CONFIG_MIPS_GIC + obj-y += clk.o timer.o +endif obj-$(CONFIG_CLKEVT_RT3352) += cevt-rt3352.o obj-$(CONFIG_RALINK_ILL_ACC) += ill_acc.o obj-$(CONFIG_IRQ_INTC) += irq.o -obj-$(CONFIG_MIPS_GIC) += irq-gic.o +obj-$(CONFIG_MIPS_GIC) += irq-gic.o timer-gic.o obj-$(CONFIG_SOC_RT288X) += rt288x.o obj-$(CONFIG_SOC_RT305X) += rt305x.o --- a/arch/mips/ralink/irq-gic.c +++ b/arch/mips/ralink/irq-gic.c @@ -3,13 +3,6 @@ #include #include -#include - -unsigned int get_c0_compare_int(void) -{ - return gic_get_c0_compare_int(); -} - void __init arch_init_irq(void) { --- /dev/null +++ b/arch/mips/ralink/timer-gic.c @@ -0,0 +1,13 @@ +#include + +#include +#include + +#include "common.h" + +void __init plat_time_init(void) +{ + ralink_of_remap(); + + clocksource_of_init(); +} --- a/arch/mips/ralink/mt7621.c +++ b/arch/mips/ralink/mt7621.c @@ -152,11 +152,14 @@ void __init ralink_clk_init(void) } break; } + /* + FIXME: detect frequency automatically cpu_clk = 880000000; ralink_clk_add("cpu", cpu_clk); ralink_clk_add("1e000b00.spi", 50000000); ralink_clk_add("1e000c00.uartlite", 50000000); ralink_clk_add("1e000d00.uart", 50000000); + */ } void __init ralink_of_remap(void)