From 1a1769d6268c93b042f635b31b43024fea7feb30 Mon Sep 17 00:00:00 2001 From: Jonas Gorski Date: Thu, 25 Apr 2013 00:31:29 +0200 Subject: [PATCH 08/14] MIPS: BCM63XX: populate irq_{stat,mask}_addr for second pin Signed-off-by: Jonas Gorski --- arch/mips/bcm63xx/irq.c | 43 ++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 42 insertions(+), 1 deletion(-) --- a/arch/mips/bcm63xx/irq.c +++ b/arch/mips/bcm63xx/irq.c @@ -30,6 +30,8 @@ static void __internal_irq_unmask_64(uns #ifdef CONFIG_BCM63XX_CPU_3368 #define irq_stat_reg0 PERF_IRQSTAT_3368_REG #define irq_mask_reg0 PERF_IRQMASK_3368_REG +#define irq_stat_reg1 0 +#define irq_mask_reg1 0 #define irq_bits 32 #define is_ext_irq_cascaded 0 #define ext_irq_start 0 @@ -41,6 +43,8 @@ static void __internal_irq_unmask_64(uns #ifdef CONFIG_BCM63XX_CPU_6328 #define irq_stat_reg0 PERF_IRQSTAT_6328_REG(0) #define irq_mask_reg0 PERF_IRQMASK_6328_REG(0) +#define irq_stat_reg1 PERF_IRQSTAT_6328_REG(1) +#define irq_mask_reg1 PERF_IRQMASK_6328_REG(1) #define irq_bits 64 #define is_ext_irq_cascaded 1 #define ext_irq_start (BCM_6328_EXT_IRQ0 - IRQ_INTERNAL_BASE) @@ -52,6 +56,8 @@ static void __internal_irq_unmask_64(uns #ifdef CONFIG_BCM63XX_CPU_6338 #define irq_stat_reg0 PERF_IRQSTAT_6338_REG #define irq_mask_reg0 PERF_IRQMASK_6338_REG +#define irq_stat_reg1 0 +#define irq_mask_reg1 0 #define irq_bits 32 #define is_ext_irq_cascaded 0 #define ext_irq_start 0 @@ -63,6 +69,8 @@ static void __internal_irq_unmask_64(uns #ifdef CONFIG_BCM63XX_CPU_6345 #define irq_stat_reg0 PERF_IRQSTAT_6345_REG #define irq_mask_reg0 PERF_IRQMASK_6345_REG +#define irq_stat_reg1 0 +#define irq_mask_reg1 0 #define irq_bits 32 #define is_ext_irq_cascaded 0 #define ext_irq_start 0 @@ -74,6 +82,8 @@ static void __internal_irq_unmask_64(uns #ifdef CONFIG_BCM63XX_CPU_6348 #define irq_stat_reg0 PERF_IRQSTAT_6348_REG #define irq_mask_reg0 PERF_IRQMASK_6348_REG +#define irq_stat_reg1 0 +#define irq_mask_reg1 0 #define irq_bits 32 #define is_ext_irq_cascaded 0 #define ext_irq_start 0 @@ -85,6 +95,8 @@ static void __internal_irq_unmask_64(uns #ifdef CONFIG_BCM63XX_CPU_6358 #define irq_stat_reg0 PERF_IRQSTAT_6358_REG(0) #define irq_mask_reg0 PERF_IRQMASK_6358_REG(0) +#define irq_stat_reg1 PERF_IRQSTAT_6358_REG(1) +#define irq_mask_reg1 PERF_IRQMASK_6358_REG(1) #define irq_bits 32 #define is_ext_irq_cascaded 1 #define ext_irq_start (BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE) @@ -96,6 +108,8 @@ static void __internal_irq_unmask_64(uns #ifdef CONFIG_BCM63XX_CPU_6362 #define irq_stat_reg0 PERF_IRQSTAT_6362_REG(0) #define irq_mask_reg0 PERF_IRQMASK_6362_REG(0) +#define irq_stat_reg1 PERF_IRQSTAT_6362_REG(1) +#define irq_mask_reg1 PERF_IRQMASK_6362_REG(1) #define irq_bits 64 #define is_ext_irq_cascaded 1 #define ext_irq_start (BCM_6362_EXT_IRQ0 - IRQ_INTERNAL_BASE) @@ -107,6 +121,8 @@ static void __internal_irq_unmask_64(uns #ifdef CONFIG_BCM63XX_CPU_6368 #define irq_stat_reg0 PERF_IRQSTAT_6368_REG(0) #define irq_mask_reg0 PERF_IRQMASK_6368_REG(0) +#define irq_stat_reg1 PERF_IRQSTAT_6368_REG(1) +#define irq_mask_reg1 PERF_IRQMASK_6368_REG(1) #define irq_bits 64 #define is_ext_irq_cascaded 1 #define ext_irq_start (BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE) @@ -128,13 +144,20 @@ static void __internal_irq_unmask_64(uns #define irq_stat_addr0 (bcm63xx_regset_address(RSET_PERF) + irq_stat_reg0) #define irq_mask_addr0 (bcm63xx_regset_address(RSET_PERF) + irq_mask_reg0) +#if (irq_stat_reg1 > 0) && (irq_mask_reg1 > 0) +#define irq_stat_addr1 (bcm63xx_regset_address(RSET_PERF) + irq_stat_reg1) +#define irq_mask_addr1 (bcm63xx_regset_address(RSET_PERF) + irq_mask_reg1) +#else +#define irq_stat_addr1 0 +#define irq_mask_addr1 0 +#endif static inline void bcm63xx_init_irq(void) { } #else /* ! BCMCPU_RUNTIME_DETECT */ -static u32 irq_stat_addr0, irq_mask_addr0; +static u32 irq_stat_addr0, irq_mask_addr0, irq_stat_addr1, irq_mask_addr1; static void (*dispatch_internal)(void); static int is_ext_irq_cascaded; static unsigned int ext_irq_count; @@ -149,11 +172,15 @@ static void bcm63xx_init_irq(void) irq_stat_addr0 = bcm63xx_regset_address(RSET_PERF); irq_mask_addr0 = bcm63xx_regset_address(RSET_PERF); + irq_stat_addr1 = bcm63xx_regset_address(RSET_PERF); + irq_mask_addr1 = bcm63xx_regset_address(RSET_PERF); switch (bcm63xx_get_cpu_id()) { case BCM3368_CPU_ID: irq_stat_addr0 += PERF_IRQSTAT_3368_REG; irq_mask_addr0 += PERF_IRQMASK_3368_REG; + irq_stat_addr1 = 0; + irq_stat_addr1 = 0; irq_bits = 32; ext_irq_count = 4; ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368; @@ -161,6 +188,8 @@ static void bcm63xx_init_irq(void) case BCM6328_CPU_ID: irq_stat_addr0 += PERF_IRQSTAT_6328_REG(0); irq_mask_addr0 += PERF_IRQMASK_6328_REG(0); + irq_stat_addr1 += PERF_IRQSTAT_6328_REG(1); + irq_stat_addr1 += PERF_IRQMASK_6328_REG(1); irq_bits = 64; ext_irq_count = 4; is_ext_irq_cascaded = 1; @@ -171,6 +200,8 @@ static void bcm63xx_init_irq(void) case BCM6338_CPU_ID: irq_stat_addr0 += PERF_IRQSTAT_6338_REG; irq_mask_addr0 += PERF_IRQMASK_6338_REG; + irq_stat_addr1 = 0; + irq_mask_addr1 = 0; irq_bits = 32; ext_irq_count = 4; ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338; @@ -178,6 +209,8 @@ static void bcm63xx_init_irq(void) case BCM6345_CPU_ID: irq_stat_addr0 += PERF_IRQSTAT_6345_REG; irq_mask_addr0 += PERF_IRQMASK_6345_REG; + irq_stat_addr1 = 0; + irq_mask_addr1 = 0; irq_bits = 32; ext_irq_count = 4; ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345; @@ -185,6 +218,8 @@ static void bcm63xx_init_irq(void) case BCM6348_CPU_ID: irq_stat_addr0 += PERF_IRQSTAT_6348_REG; irq_mask_addr0 += PERF_IRQMASK_6348_REG; + irq_stat_addr1 = 0; + irq_mask_addr1 = 0; irq_bits = 32; ext_irq_count = 4; ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6348; @@ -192,6 +227,8 @@ static void bcm63xx_init_irq(void) case BCM6358_CPU_ID: irq_stat_addr0 += PERF_IRQSTAT_6358_REG(0); irq_mask_addr0 += PERF_IRQMASK_6358_REG(0); + irq_stat_addr1 += PERF_IRQSTAT_6358_REG(1); + irq_mask_addr1 += PERF_IRQMASK_6358_REG(1); irq_bits = 32; ext_irq_count = 4; is_ext_irq_cascaded = 1; @@ -202,6 +239,8 @@ static void bcm63xx_init_irq(void) case BCM6362_CPU_ID: irq_stat_addr0 += PERF_IRQSTAT_6362_REG(0); irq_mask_addr0 += PERF_IRQMASK_6362_REG(0); + irq_stat_addr1 += PERF_IRQSTAT_6362_REG(1); + irq_mask_addr1 += PERF_IRQMASK_6362_REG(1); irq_bits = 64; ext_irq_count = 4; is_ext_irq_cascaded = 1; @@ -212,6 +251,8 @@ static void bcm63xx_init_irq(void) case BCM6368_CPU_ID: irq_stat_addr0 += PERF_IRQSTAT_6368_REG(0); irq_mask_addr0 += PERF_IRQMASK_6368_REG(0); + irq_stat_addr1 += PERF_IRQSTAT_6368_REG(1); + irq_mask_addr1 += PERF_IRQMASK_6368_REG(1); irq_bits = 64; ext_irq_count = 6; is_ext_irq_cascaded = 1;