--- a/arch/mips/ath79/gpio.c
+++ b/arch/mips/ath79/gpio.c
@@ -33,6 +33,7 @@ static void __iomem *ath79_gpio_get_func
 		reg = AR71XX_GPIO_REG_FUNC;
 	else if (soc_is_ar934x() ||
 		 soc_is_qca953x() ||
+		 soc_is_qca955x() ||
 		 soc_is_qca956x() ||
 		 soc_is_tp9343())
 		reg = AR934X_GPIO_REG_FUNC;
@@ -64,15 +65,21 @@ void ath79_gpio_function_disable(u32 mas
 void __init ath79_gpio_output_select(unsigned gpio, u8 val)
 {
 	void __iomem *base = ath79_gpio_base;
-	unsigned int reg;
+	unsigned int reg, reg_base;
 	u32 t, s;
 
-	BUG_ON(!soc_is_ar934x() && !soc_is_qca953x() && !soc_is_qca956x());
-
-	if (gpio >= AR934X_GPIO_COUNT)
-		return;
+	if (soc_is_ar934x())
+		reg_base = AR934X_GPIO_REG_OUT_FUNC0;
+	else if (soc_is_qca953x())
+		reg_base = QCA953X_GPIO_REG_OUT_FUNC0;
+	else if (soc_is_qca955x())
+		reg_base = QCA955X_GPIO_REG_OUT_FUNC0;
+	else if (soc_is_qca956x())
+		reg_base = QCA956X_GPIO_REG_OUT_FUNC0;
+	else
+		BUG();
 
-	reg = AR934X_GPIO_REG_OUT_FUNC0 + 4 * (gpio / 4);
+	reg = reg_base + 4 * (gpio / 4);
 	s = 8 * (gpio % 4);
 
 	t = __raw_readl(base + reg);