From 0338642c5eeaaf03cd4a63e211b94596c559e6e5 Mon Sep 17 00:00:00 2001 From: Jes Sorensen Date: Wed, 22 Jun 2016 22:09:35 -0400 Subject: [PATCH] rtl8xxxu: gen1: Set aggregation timeout (REG_RXDMA_AGG_PG_TH + 1) as well gen2 chips as well as 8188eu seems to use this register for setting DMA timeout threshold values, however the 8192cu is using REG_USB_DMA_AGG_TO. Set both to be on the safe side. Signed-off-by: Jes Sorensen --- drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) --- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c +++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c @@ -4410,7 +4410,7 @@ void rtl8xxxu_gen2_report_connect(struct void rtl8xxxu_gen1_init_aggregation(struct rtl8xxxu_priv *priv) { - u8 agg_ctrl, usb_spec, page_thresh; + u8 agg_ctrl, usb_spec, page_thresh, timeout; usb_spec = rtl8xxxu_read8(priv, REG_USB_SPECIAL_OPTION); usb_spec &= ~USB_SPEC_USB_AGG_ENABLE; @@ -4442,7 +4442,14 @@ void rtl8xxxu_gen1_init_aggregation(stru page_thresh = (priv->fops->rx_agg_buf_size / 512); rtl8xxxu_write8(priv, REG_RXDMA_AGG_PG_TH, page_thresh); - rtl8xxxu_write8(priv, REG_USB_DMA_AGG_TO, 4); + /* + * REG_RXDMA_AGG_PG_TH + 1 seems to be the timeout register on + * gen2 chips and rtl8188eu. The rtl8723au seems unhappy if we + * don't set it, so better set both. + */ + timeout = 4; + rtl8xxxu_write8(priv, REG_RXDMA_AGG_PG_TH + 1, timeout); + rtl8xxxu_write8(priv, REG_USB_DMA_AGG_TO, timeout); priv->rx_buf_aggregation = 1; }