From c8eed9a50a62afafe239d09d99521838daa978b4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= Date: Thu, 16 Apr 2015 21:20:37 +0000 Subject: brcm47xx: explicitly select CPU_MIPS32_R2 and CPU_MIPSR2 for mips74k MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The mips74k subtarget of brcm47xx configures gcc to compile for mips32r2; however, the generated kernel config for 3.14 and later kernels ends up with CPU_MIPS32_R1 and CPU_MIPSR1 selected. The generated kernel config for the 3.10 kernel (Barrier Breaker) properly selected CPU_MIPS32_R2 and CPU_MIPSR2. Modify the default kernel config for mips74k to explicitly select CPU_MIPS32_R2 and CPU_MIPSR2. Signed-off-by: Nathan Hintz Tested-by: Rafał Miłecki SVN-Revision: 45469 --- target/linux/brcm47xx/mips74k/config-default | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'target/linux') diff --git a/target/linux/brcm47xx/mips74k/config-default b/target/linux/brcm47xx/mips74k/config-default index 2b4497d15c..09ff5a9037 100644 --- a/target/linux/brcm47xx/mips74k/config-default +++ b/target/linux/brcm47xx/mips74k/config-default @@ -2,6 +2,10 @@ # CONFIG_BCM47XX_SSB is not set CONFIG_BGMAC=y CONFIG_BOUNCE=y +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPSR1 is not set +CONFIG_CPU_MIPS32_R2=y +CONFIG_CPU_MIPSR2=y # CONFIG_FIXED_PHY is not set # CONFIG_GPIO_WDT is not set CONFIG_HIGHMEM=y -- cgit v1.2.3