From 34ca9f355ec9504ed9458c5e693b79551893d2f8 Mon Sep 17 00:00:00 2001 From: Zoltan Herpai Date: Sat, 4 Jan 2014 16:30:56 +0000 Subject: sunxi: add sata driver for sun[47]i Signed-off-by: Zoltan HERPAI SVN-Revision: 39197 --- .../patches-3.12/192-dt-add-ahci-sun47i.patch | 193 +++++++++++++++++++++ 1 file changed, 193 insertions(+) create mode 100644 target/linux/sunxi/patches-3.12/192-dt-add-ahci-sun47i.patch (limited to 'target/linux/sunxi/patches-3.12/192-dt-add-ahci-sun47i.patch') diff --git a/target/linux/sunxi/patches-3.12/192-dt-add-ahci-sun47i.patch b/target/linux/sunxi/patches-3.12/192-dt-add-ahci-sun47i.patch new file mode 100644 index 0000000000..a9d5056f93 --- /dev/null +++ b/target/linux/sunxi/patches-3.12/192-dt-add-ahci-sun47i.patch @@ -0,0 +1,193 @@ +From e5b4d58432bec91414e82069a402d61e6aed631e Mon Sep 17 00:00:00 2001 +From: Oliver Schinagl +Date: Tue, 3 Dec 2013 12:10:11 +0100 +Subject: [PATCH] ARM: sunxi: dts: Add ahci support to a few A10 and A20 boards + +This patch adds sunxi sata support to A10 and A20 boards that have such +a connector. Some boards also feature a regulator via a GPIO and support +for this is also added. + +Signed-off-by: Olliver Schinagl +--- + arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 27 +++++++++++++++++++++++++ + arch/arm/boot/dts/sun4i-a10.dtsi | 9 +++++++++ + arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 27 +++++++++++++++++++++++++ + arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 27 +++++++++++++++++++++++++ + arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 26 ++++++++++++++++++++++++ + arch/arm/boot/dts/sun7i-a20.dtsi | 9 +++++++++ + 6 files changed, 125 insertions(+) + +diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts +index d193937..63bd00d 100644 +--- a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts ++++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts +@@ -51,7 +51,19 @@ + status = "okay"; + }; + ++ sata: ahci@01c18000 { ++ pwr-supply = <®_ahci_5v>; ++ status = "okay"; ++ }; ++ + pinctrl@01c20800 { ++ ahci_pwr_pin: ahci_pwr_pin@0 { ++ allwinner,pins = "PB8"; ++ allwinner,function = "gpio_out"; ++ allwinner,drive = <0>; ++ allwinner,pull = <0>; ++ }; ++ + mmc0_cd_pin_cubieboard: mmc0_cd_pin@0 { + allwinner,pins = "PH1"; + allwinner,function = "gpio_in"; +@@ -102,4 +114,19 @@ + linux,default-trigger = "heartbeat"; + }; + }; ++ ++ regulators { ++ compatible = "simple-bus"; ++ pinctrl-names = "default"; ++ ++ reg_ahci_5v: ahci-5v { ++ compatible = "regulator-fixed"; ++ regulator-name = "ahci-5v"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ pinctrl-0 = <&ahci_pwr_pin>; ++ gpio = <&pio 1 8 0>; ++ enable-active-high; ++ }; ++ }; + }; +diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi +index 13bccd5..a6dafec 100644 +--- a/arch/arm/boot/dts/sun4i-a10.dtsi ++++ b/arch/arm/boot/dts/sun4i-a10.dtsi +@@ -315,6 +315,15 @@ + status = "disabled"; + }; + ++ sata: ahci@01c18000 { ++ compatible = "allwinner,sun4i-a10-ahci"; ++ reg = <0x01c18000 0x1000>; ++ interrupts = <56>; ++ clocks = <&ahb_gates 25>, <&pll6 0>; ++ clock-names = "ahb_sata", "pll6_sata"; ++ status = "disabled"; ++ }; ++ + intc: interrupt-controller@01c20400 { + compatible = "allwinner,sun4i-ic"; + reg = <0x01c20400 0x400>; +diff --git a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts +index ea55563..1d810bb 100644 +--- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts ++++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts +@@ -28,7 +28,19 @@ + status = "okay"; + }; + ++ sata: ahci@01c18000 { ++ pwr-supply = <®_ahci_5v>; ++ status = "okay"; ++ }; ++ + pinctrl@01c20800 { ++ ahci_pwr_pin: ahci_pwr_pin@0 { ++ allwinner,pins = "PB8"; ++ allwinner,function = "gpio_out"; ++ allwinner,drive = <0>; ++ allwinner,pull = <0>; ++ }; ++ + mmc0_cd_pin_cubieboard2: mmc0_cd_pin@0 { + allwinner,pins = "PH1"; + allwinner,function = "gpio_in"; +@@ -86,4 +98,19 @@ + gpios = <&pio 7 20 0>; + }; + }; ++ ++ regulators { ++ compatible = "simple-bus"; ++ pinctrl-names = "default"; ++ ++ reg_ahci_5v: ahci-5v { ++ compatible = "regulator-fixed"; ++ regulator-name = "ahci-5v"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ pinctrl-0 = <&ahci_pwr_pin>; ++ gpio = <&pio 1 8 0>; ++ enable-active-high; ++ }; ++ }; + }; +diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts +index bc04cc7..5e9f2ab 100644 +--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts ++++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts +@@ -37,7 +37,19 @@ + status = "okay"; + }; + ++ sata: ahci@01c18000 { ++ pwr-supply = <®_ahci_5v>; ++ status = "okay"; ++ }; ++ + pinctrl@01c20800 { ++ ahci_pwr_pin: ahci_pwr_pin@0 { ++ allwinner,pins = "PB8"; ++ allwinner,function = "gpio_out"; ++ allwinner,drive = <0>; ++ allwinner,pull = <0>; ++ }; ++ + mmc0_cd_pin_olinuxinom: mmc0_cd_pin@0 { + allwinner,pins = "PH1"; + allwinner,function = "gpio_in"; +@@ -116,4 +128,18 @@ + default-state = "on"; + }; + }; ++ ++ regulators { ++ compatible = "simple-bus"; ++ ++ reg_ahci_5v: ahci-5v { ++ compatible = "regulator-fixed"; ++ regulator-name = "ahci-5v"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ pinctrl-0 = <&ahci_pwr_pin>; ++ gpio = <&pio 1 8 0>; ++ enable-active-high; ++ }; ++ }; + }; +diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi +index 7ebfc89..f161590 100644 +--- a/arch/arm/boot/dts/sun7i-a20.dtsi ++++ b/arch/arm/boot/dts/sun7i-a20.dtsi +@@ -432,6 +432,15 @@ + }; + }; + ++ sata: ahci@01c18000 { ++ compatible = "allwinner,sun4i-a10-ahci"; ++ reg = <0x01c18000 0x1000>; ++ interrupts = <0 56 1>; ++ clocks = <&ahb_gates 25>, <&pll6 0>; ++ clock-names = "ahb_sata", "pll6_sata"; ++ status = "disabled"; ++ }; ++ + timer@01c20c00 { + compatible = "allwinner,sun4i-timer"; + reg = <0x01c20c00 0x90>; +-- +1.8.5.1 + -- cgit v1.2.3