From 0a42b02126bf220768fcece1ab9e82e302005808 Mon Sep 17 00:00:00 2001 From: Gabor Juhos Date: Wed, 12 Sep 2012 19:03:12 +0000 Subject: ramips/rt305x: add initial support for Rt5350 SoC Somehow detecting the RAM size in common/setup.c doesn't work here, it always detects 64M and then crashes on devices with less RAM. Probably using MEMC_REG_SDRAM_CFG1 to know the RAM size is how it could be, for now I use the mem=32M kernel parameter to get stuff working. Signed-off-by: Daniel Golle SVN-Revision: 33381 --- .../ramips/files/arch/mips/ralink/rt305x/clock.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) (limited to 'target/linux/ramips/files/arch/mips/ralink/rt305x/clock.c') diff --git a/target/linux/ramips/files/arch/mips/ralink/rt305x/clock.c b/target/linux/ramips/files/arch/mips/ralink/rt305x/clock.c index 958547611b..c46a1747b5 100644 --- a/target/linux/ramips/files/arch/mips/ralink/rt305x/clock.c +++ b/target/linux/ramips/files/arch/mips/ralink/rt305x/clock.c @@ -62,6 +62,27 @@ void __init rt305x_clocks_init(void) rt305x_sys_clk.rate = rt305x_cpu_clk.rate / 3; rt305x_uart_clk.rate = 40000000; rt305x_wdt_clk.rate = rt305x_sys_clk.rate; + } else if (soc_is_rt5350()) { + t = (t >> RT5350_SYSCFG0_CPUCLK_SHIFT) & + RT5350_SYSCFG0_CPUCLK_MASK; + switch (t) { + case RT5350_SYSCFG0_CPUCLK_360: + rt305x_cpu_clk.rate = 360000000; + rt305x_sys_clk.rate = rt305x_cpu_clk.rate / 3; + break; + case RT5350_SYSCFG0_CPUCLK_320: + rt305x_cpu_clk.rate = 320000000; + rt305x_sys_clk.rate = rt305x_cpu_clk.rate / 4; + break; + case RT5350_SYSCFG0_CPUCLK_300: + rt305x_cpu_clk.rate = 300000000; + rt305x_sys_clk.rate = rt305x_cpu_clk.rate / 3; + break; + default: + BUG(); + } + rt305x_uart_clk.rate = 40000000; + rt305x_wdt_clk.rate = rt305x_sys_clk.rate; } else { BUG(); } -- cgit v1.2.3