From 69ee1807edca271e31804efb033fee92c111b738 Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Sun, 18 Jan 2015 20:16:44 +0000 Subject: ralink: add ethernet fe and esw reset control bit Signed-off-by: michael lee SVN-Revision: 44042 --- target/linux/ramips/dts/rt2880.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'target/linux/ramips/dts/rt2880.dtsi') diff --git a/target/linux/ramips/dts/rt2880.dtsi b/target/linux/ramips/dts/rt2880.dtsi index 646cb6a991..feabe42572 100644 --- a/target/linux/ramips/dts/rt2880.dtsi +++ b/target/linux/ramips/dts/rt2880.dtsi @@ -149,6 +149,11 @@ }; }; + rstctrl: rstctrl { + compatible = "ralink,rt2880-reset"; + #reset-cells = <1>; + }; + ethernet@400000 { compatible = "ralink,rt2880-eth"; reg = <0x00400000 10000>; @@ -156,6 +161,9 @@ #address-cells = <1>; #size-cells = <0>; + resets = <&rstctrl 18>; + reset-names = "fe"; + interrupt-parent = <&cpuintc>; interrupts = <5>; -- cgit v1.2.3