From 55fb6f3a05deb4a8b5e600cc10bae9555a9f90be Mon Sep 17 00:00:00 2001 From: John Crispin Date: Sun, 23 Jun 2013 15:50:49 +0000 Subject: ralink: update patches Signed-off-by: John Crispin SVN-Revision: 37016 --- target/linux/ramips/dts/mt7620a.dtsi | 294 +++++++++++++++++++++++++++++++++++ 1 file changed, 294 insertions(+) create mode 100644 target/linux/ramips/dts/mt7620a.dtsi (limited to 'target/linux/ramips/dts/mt7620a.dtsi') diff --git a/target/linux/ramips/dts/mt7620a.dtsi b/target/linux/ramips/dts/mt7620a.dtsi new file mode 100644 index 0000000000..104abfbfbf --- /dev/null +++ b/target/linux/ramips/dts/mt7620a.dtsi @@ -0,0 +1,294 @@ +/ { + #address-cells = <1>; + #size-cells = <1>; + compatible = "ralink,mtk7620a-soc"; + + cpus { + cpu@0 { + compatible = "mips,mips24KEc"; + }; + }; + + cpuintc: cpuintc@0 { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + compatible = "mti,cpu-interrupt-controller"; + }; + + palmbus@10000000 { + compatible = "palmbus"; + reg = <0x10000000 0x200000>; + ranges = <0x0 0x10000000 0x1FFFFF>; + + #address-cells = <1>; + #size-cells = <1>; + + sysc@0 { + compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc"; + reg = <0x0 0x100>; + }; + + timer@100 { + compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer"; + reg = <0x100 0x20>; + + interrupt-parent = <&intc>; + interrupts = <1>; + }; + + watchdog@120 { + compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt"; + reg = <0x120 0x10>; + + resets = <&rstctrl 8>; + reset-names = "wdt"; + + interrupt-parent = <&intc>; + interrupts = <1>; + }; + + intc: intc@200 { + compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc"; + reg = <0x200 0x100>; + + resets = <&rstctrl 19>; + reset-names = "intc"; + + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&cpuintc>; + interrupts = <2>; + }; + + memc@300 { + compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc"; + reg = <0x300 0x100>; + + resets = <&rstctrl 20>; + reset-names = "mc"; + + interrupt-parent = <&intc>; + interrupts = <3>; + }; + + uart@500 { + compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a"; + reg = <0x500 0x100>; + + resets = <&rstctrl 12>; + reset-names = "uart"; + + interrupt-parent = <&intc>; + interrupts = <5>; + + reg-shift = <2>; + + status = "disabled"; + }; + + gpio0: gpio@600 { + compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio"; + reg = <0x600 0x34>; + + resets = <&rstctrl 13>; + reset-names = "pio"; + + interrupt-parent = <&intc>; + interrupts = <6>; + + gpio-controller; + #gpio-cells = <2>; + + ralink,gpio-base = <0>; + ralink,num-gpios = <24>; + ralink,register-map = [ 00 04 08 0c + 20 24 28 2c + 30 34 ]; + + status = "disabled"; + }; + + gpio1: gpio@638 { + compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio"; + reg = <0x638 0x24>; + + interrupt-parent = <&intc>; + interrupts = <6>; + + gpio-controller; + #gpio-cells = <2>; + + ralink,gpio-base = <24>; + ralink,num-gpios = <16>; + ralink,register-map = [ 00 04 08 0c + 10 14 18 1c + 20 24 ]; + + status = "disabled"; + }; + + gpio2: gpio@660 { + compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio"; + reg = <0x660 0x24>; + + interrupt-parent = <&intc>; + interrupts = <6>; + + gpio-controller; + #gpio-cells = <2>; + + ralink,gpio-base = <40>; + ralink,num-gpios = <32>; + ralink,register-map = [ 00 04 08 0c + 10 14 18 1c + 20 24 ]; + + status = "disabled"; + }; + + i2c@900 { + compatible = "link,mt7620a-i2c", "ralink,rt2880-i2c"; + reg = <0x900 0x100>; + + resets = <&rstctrl 16>; + reset-names = "i2c"; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + }; + + spi@b00 { + compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi"; + reg = <0xb00 0x100>; + + resets = <&rstctrl 18>; + reset-names = "spi"; + + #address-cells = <1>; + #size-cells = <1>; + + status = "disabled"; + }; + + uartlite@c00 { + compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a"; + reg = <0xc00 0x100>; + + resets = <&rstctrl 19>; + reset-names = "uartl"; + + interrupt-parent = <&intc>; + interrupts = <12>; + + reg-shift = <2>; + }; + + systick@d00 { + compatible = "ralink,mt7620a-systick", "ralink,cevt-systick"; + reg = <0xd00 0x10>; + + resets = <&rstctrl 28>; + reset-names = "intc"; + + interrupt-parent = <&cpuintc>; + interrupts = <7>; + }; + + gdma@2800 { + compatible = "ralink,mt7620a-gdma", "ralink,rt2880-gdma"; + reg = <0x2800 0x800>; + + resets = <&rstctrl 14>; + reset-names = "dma"; + + interrupt-parent = <&intc>; + interrupts = <7>; + }; + }; + + rstctrl: rstctrl { + compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset"; + #reset-cells = <1>; + }; + + ubsphy { + compatible = "ralink,mt7620a-usbphy"; + + resets = <&rstctrl 22 &rstctrl 25>; + reset-names = "host", "device"; + }; + + ethernet@10100000 { + compatible = "ralink,mt7620a-eth"; + reg = <0x10100000 10000>; + + #address-cells = <1>; + #size-cells = <0>; + + interrupt-parent = <&cpuintc>; + interrupts = <5>; + + status = "disabled"; + + mdio-bus { + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + }; + }; + + gsw@10110000 { + compatible = "ralink,mt7620a-gsw"; + reg = <0x10110000 8000>; + + interrupt-parent = <&intc>; + interrupts = <17>; + + status = "disabled"; + }; + + sdhci@10130000 { + compatible = "ralink,mt7620a-sdhci"; + reg = <0x10130000 4000>; + + interrupt-parent = <&intc>; + interrupts = <14>; + + status = "disabled"; + }; + + ehci@101c0000 { + compatible = "ralink,rt3xxx-ehci"; + reg = <0x101c0000 0x1000>; + + interrupt-parent = <&intc>; + interrupts = <18>; + }; + + ohci@101c1000 { + compatible = "ralink,rt3xxx-ohci"; + reg = <0x101c1000 0x1000>; + + interrupt-parent = <&intc>; + interrupts = <18>; + }; + + pcie@10140000 { + compatible = "ralink,mt7620a-pci"; + reg = <0x10140000 0x100 + 0x10142000 0x100>; + + resets = <&rstctrl 26>; + reset-names = "pcie0"; + + interrupt-parent = <&cpuintc>; + interrupts = <4>; + + status = "disabled"; + }; +}; -- cgit v1.2.3