From 374cae9e6fcaf4cf4de4f2095f3fec558da51df6 Mon Sep 17 00:00:00 2001 From: Andrew Yong Date: Wed, 11 May 2016 00:17:54 +0800 Subject: ramips: add initial support for SamKnows SK-WB8 Signed-off-by: Andrew Yong --- target/linux/ramips/dts/SK-WB8.dts | 124 +++++++++++++++++++++++++++++++++++++ 1 file changed, 124 insertions(+) create mode 100644 target/linux/ramips/dts/SK-WB8.dts (limited to 'target/linux/ramips/dts/SK-WB8.dts') diff --git a/target/linux/ramips/dts/SK-WB8.dts b/target/linux/ramips/dts/SK-WB8.dts new file mode 100644 index 0000000000..bb1e38225a --- /dev/null +++ b/target/linux/ramips/dts/SK-WB8.dts @@ -0,0 +1,124 @@ +/dts-v1/; + +#include "mt7621.dtsi" + +/ { + compatible = "mediatek,mt7621-eval-board", "mediatek,mt7621-soc"; + model = "SamKnows Whitebox 8"; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x8000000>; + }; + + chosen { + bootargs = "console=ttyS0,57600"; + }; + + gpio-leds { + compatible = "gpio-leds"; + + wps { + label = "sk-wb8:green:wps"; + gpios = <&gpio1 14 1>; + }; + + usb { + label = "sk-wb8:green:usb"; + gpios = <&gpio1 15 1>; + }; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <20>; + wps { + label = "wps"; + gpios = <&gpio1 11 1>; + linux,code = <0x211>; + }; + reset { + label = "reset"; + gpios = <&gpio1 9 1>; + linux,code = <0x198>; + }; + }; +}; + +&spi0 { + status = "okay"; + + m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0 0>; + linux,modalias = "m25p80"; + spi-max-frequency = <10000000>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x30000>; + read-only; + }; + + partition@30000 { + label = "u-boot-env"; + reg = <0x30000 0x10000>; + }; + + factory: partition@40000 { + label = "factory"; + reg = <0x40000 0x10000>; + read-only; + }; + + partition@50000 { + label = "firmware"; + reg = <0x50000 0x7b0000>; + }; + + partition@e30000 { + label = "recovery"; + reg = <0xe30000 0x1d0000>; + }; + + }; +}; + +&pcie { + status = "okay"; + + pcie0 { + mt76@0,0 { + reg = <0x0000 0 0 0 0>; + device_type = "pci"; + mediatek,mtd-eeprom = <&factory 0x8000>; + mediatek,2ghz = <0>; + }; + }; + + pcie1 { + mt76@1,0 { + reg = <0x0000 0 0 0 0>; + device_type = "pci"; + mediatek,mtd-eeprom = <&factory 0x0000>; + mediatek,5ghz = <0>; + }; + }; +}; + +ðernet { + mtd-mac-address = <&factory 0xe000>; +}; + +&pinctrl { + state_default: pinctrl0 { + gpio { + ralink,group = "i2c", "uart2", "uart3", "rgmii2", "sdhci"; + ralink,function = "gpio"; + }; + }; +}; -- cgit v1.2.3