From 9195d8da355d0d141ac02c9a5269452dc64ffd2d Mon Sep 17 00:00:00 2001 From: Stanislav Galabov Date: Tue, 10 May 2016 13:41:46 +0300 Subject: ramips: DTS rework Add node aliases to dtsi files. Reword dts files so they're more in-line with upstream. Fix some more warnings and errors reported by dtc Signed-off-by: Stanislav Galabov --- target/linux/ramips/dts/MT7620a_V22SG.dts | 116 +++++++++++++++--------------- 1 file changed, 58 insertions(+), 58 deletions(-) (limited to 'target/linux/ramips/dts/MT7620a_V22SG.dts') diff --git a/target/linux/ramips/dts/MT7620a_V22SG.dts b/target/linux/ramips/dts/MT7620a_V22SG.dts index 8dff80d40a..a3e206e5dd 100644 --- a/target/linux/ramips/dts/MT7620a_V22SG.dts +++ b/target/linux/ramips/dts/MT7620a_V22SG.dts @@ -6,64 +6,6 @@ compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc"; model = "Ralink MT7620a V22SG High Power evaluation board"; - pinctrl { - state_default: pinctrl0 { - gpio { - ralink,group = "i2c", "uartf", "spi"; - ralink,function = "gpio"; - }; - }; - }; - - ethernet@10100000 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>; - mediatek,portmap = "llllw"; - - port@4 { - status = "okay"; - phy-handle = <&phy4>; - phy-mode = "rgmii"; - }; - - port@5 { - status = "okay"; - phy-handle = <&phy5>; - phy-mode = "rgmii"; - }; - - mdio-bus { - status = "okay"; - - phy4: ethernet-phy@4 { - reg = <4>; - phy-mode = "rgmii"; - }; - - phy5: ethernet-phy@5 { - reg = <5>; - phy-mode = "rgmii"; - }; - }; - }; - - gsw@10110000 { - mediatek,port4 = "gmac"; - }; - - pcie@10140000 { - status = "okay"; - }; - - ehci@101c0000 { - status = "okay"; - }; - - ohci@101c1000 { - status = "okay"; - }; - gpio-keys-polled { compatible = "gpio-keys-polled"; #address-cells = <1>; @@ -112,3 +54,61 @@ }; }; }; + +&pinctrl { + state_default: pinctrl0 { + gpio { + ralink,group = "i2c", "uartf", "spi"; + ralink,function = "gpio"; + }; + }; +}; + +ðernet { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>; + mediatek,portmap = "llllw"; + + port@4 { + status = "okay"; + phy-handle = <&phy4>; + phy-mode = "rgmii"; + }; + + port@5 { + status = "okay"; + phy-handle = <&phy5>; + phy-mode = "rgmii"; + }; + + mdio-bus { + status = "okay"; + + phy4: ethernet-phy@4 { + reg = <4>; + phy-mode = "rgmii"; + }; + + phy5: ethernet-phy@5 { + reg = <5>; + phy-mode = "rgmii"; + }; + }; +}; + +&gsw { + mediatek,port4 = "gmac"; +}; + +&pcie { + status = "okay"; +}; + +&ehci { + status = "okay"; +}; + +&ohci { + status = "okay"; +}; -- cgit v1.2.3