From 95f14d052a7439c60e35a6d910d6bd3de023907c Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Sat, 9 Mar 2013 18:51:46 +0000 Subject: cns3xxx: add linux 3.8 support and use it by default SVN-Revision: 35908 --- .../patches-3.8/097-l2x0_cmdline_disable.patch | 70 ++++++++++++++++++++++ 1 file changed, 70 insertions(+) create mode 100644 target/linux/cns3xxx/patches-3.8/097-l2x0_cmdline_disable.patch (limited to 'target/linux/cns3xxx/patches-3.8/097-l2x0_cmdline_disable.patch') diff --git a/target/linux/cns3xxx/patches-3.8/097-l2x0_cmdline_disable.patch b/target/linux/cns3xxx/patches-3.8/097-l2x0_cmdline_disable.patch new file mode 100644 index 0000000000..eb5c8113c3 --- /dev/null +++ b/target/linux/cns3xxx/patches-3.8/097-l2x0_cmdline_disable.patch @@ -0,0 +1,70 @@ +--- a/arch/arm/mach-cns3xxx/core.c ++++ b/arch/arm/mach-cns3xxx/core.c +@@ -293,13 +293,26 @@ struct sys_timer cns3xxx_timer = { + + #ifdef CONFIG_CACHE_L2X0 + +-void __init cns3xxx_l2x0_init(void) ++static int cns3xxx_l2x0_enable = 1; ++ ++static int __init cns3xxx_l2x0_disable(char *s) ++{ ++ cns3xxx_l2x0_enable = 0; ++ return 1; ++} ++__setup("nol2x0", cns3xxx_l2x0_disable); ++ ++static int __init cns3xxx_l2x0_init(void) + { +- void __iomem *base = ioremap(CNS3XXX_L2C_BASE, SZ_4K); ++ void __iomem *base; + u32 val; + ++ if (!cns3xxx_l2x0_enable) ++ return 0; ++ ++ base = ioremap(CNS3XXX_L2C_BASE, SZ_4K); + if (WARN_ON(!base)) +- return; ++ return 0; + + /* + * Tag RAM Control register +@@ -329,7 +342,10 @@ void __init cns3xxx_l2x0_init(void) + + /* 32 KiB, 8-way, parity disable */ + l2x0_init(base, 0x00540000, 0xfe000fff); ++ ++ return 0; + } ++arch_initcall(cns3xxx_l2x0_init); + + #endif /* CONFIG_CACHE_L2X0 */ + +--- a/arch/arm/mach-cns3xxx/cns3420vb.c ++++ b/arch/arm/mach-cns3xxx/cns3420vb.c +@@ -241,8 +241,6 @@ static struct platform_device *cns3420_p + + static void __init cns3420_init(void) + { +- cns3xxx_l2x0_init(); +- + platform_add_devices(cns3420_pdevs, ARRAY_SIZE(cns3420_pdevs)); + + cns3xxx_ahci_init(); +--- a/arch/arm/mach-cns3xxx/core.h ++++ b/arch/arm/mach-cns3xxx/core.h +@@ -15,13 +15,6 @@ extern struct smp_operations cns3xxx_smp + extern struct sys_timer cns3xxx_timer; + extern void cns3xxx_pcie_iotable_init(void); + +- +-#ifdef CONFIG_CACHE_L2X0 +-void __init cns3xxx_l2x0_init(void); +-#else +-static inline void cns3xxx_l2x0_init(void) {} +-#endif /* CONFIG_CACHE_L2X0 */ +- + void __init cns3xxx_common_init(void); + void __init cns3xxx_init_irq(void); + int __init cns3xxx_pcie_init(void); -- cgit v1.2.3