From 47050e72be0e8cf10156051e16e7ea9664398b09 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Mon, 8 Dec 2008 14:14:37 +0000 Subject: Prepare bcm63xx for SPI master support SVN-Revision: 13547 --- .../linux/brcm63xx/files/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'target/linux/brcm63xx/files/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h') diff --git a/target/linux/brcm63xx/files/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h b/target/linux/brcm63xx/files/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h index 29b61fd547..5e3cd9100a 100644 --- a/target/linux/brcm63xx/files/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h +++ b/target/linux/brcm63xx/files/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h @@ -81,6 +81,7 @@ enum bcm63xx_regs_set { #define RSET_ENET_SIZE 2048 #define RSET_ENETDMA_SIZE 2048 #define RSET_UART_SIZE 24 +#define RSET_SPI_SIZE 2048 #define RSET_UDC_SIZE 256 #define RSET_OHCI_SIZE 256 #define RSET_EHCI_SIZE 256 @@ -249,6 +250,7 @@ static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set) enum bcm63xx_irq { IRQ_TIMER = 0, IRQ_UART0, + IRQ_SPI, IRQ_DSL, IRQ_ENET0, IRQ_ENET1, @@ -268,6 +270,7 @@ enum bcm63xx_irq { * 6348 irqs */ #define BCM_6348_TIMER_IRQ (IRQ_INTERNAL_BASE + 0) +#define BCM_6348_SPI_IRQ (IRQ_INTERNAL_BASE + 1) #define BCM_6348_UART0_IRQ (IRQ_INTERNAL_BASE + 2) #define BCM_6348_DSL_IRQ (IRQ_INTERNAL_BASE + 4) #define BCM_6348_ENET1_IRQ (IRQ_INTERNAL_BASE + 7) @@ -285,6 +288,7 @@ enum bcm63xx_irq { * 6358 irqs */ #define BCM_6358_TIMER_IRQ (IRQ_INTERNAL_BASE + 0) +#define BCM_6358_SPI_IRQ (IRQ_INTERNAL_BASE + 1) #define BCM_6358_UART0_IRQ (IRQ_INTERNAL_BASE + 2) #define BCM_6358_OHCI0_IRQ (IRQ_INTERNAL_BASE + 5) #define BCM_6358_ENET1_IRQ (IRQ_INTERNAL_BASE + 6) -- cgit v1.2.3