From a3cde14f5a9ef0bca820341cbbd6d5cfb80451fc Mon Sep 17 00:00:00 2001 From: Alexey Brodkin Date: Tue, 16 Aug 2016 14:49:16 +0300 Subject: arc: use patched .dts from sources Instead of using off-the-tree .dts files for ARC boards we're switching to use in-tree ones. And for that to work properly we apply upstream patch that adds currently missing "model" property. Upstream patch and discussion could be found here: http://lists.infradead.org/pipermail/linux-snps-arc/2016-August/001394.html Signed-off-by: Alexey Brodkin Cc: Jonas Gorski Cc: John Crispin --- target/linux/archs38/dts/axc003_idu.dtsi | 126 ----------------- target/linux/archs38/dts/axs103_idu.dts | 25 ---- target/linux/archs38/dts/axs10x_mb.dtsi | 225 ------------------------------- target/linux/archs38/dts/nsim_hs_idu.dts | 73 ---------- target/linux/archs38/dts/skeleton.dtsi | 37 ----- target/linux/archs38/image/Makefile | 2 +- 6 files changed, 1 insertion(+), 487 deletions(-) delete mode 100644 target/linux/archs38/dts/axc003_idu.dtsi delete mode 100644 target/linux/archs38/dts/axs103_idu.dts delete mode 100644 target/linux/archs38/dts/axs10x_mb.dtsi delete mode 100644 target/linux/archs38/dts/nsim_hs_idu.dts delete mode 100644 target/linux/archs38/dts/skeleton.dtsi (limited to 'target/linux/archs38') diff --git a/target/linux/archs38/dts/axc003_idu.dtsi b/target/linux/archs38/dts/axc003_idu.dtsi deleted file mode 100644 index 06a9f294a2..0000000000 --- a/target/linux/archs38/dts/axc003_idu.dtsi +++ /dev/null @@ -1,126 +0,0 @@ -/* - * Copyright (C) 2014, 2015 Synopsys, Inc. (www.synopsys.com) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/* - * Device tree for AXC003 CPU card: HS38x2 (Dual Core) with IDU intc - */ - -/ { - compatible = "snps,arc"; - clock-frequency = <90000000>; - #address-cells = <1>; - #size-cells = <1>; - - cpu_card { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - - ranges = <0x00000000 0xf0000000 0x10000000>; - - cpu_intc: archs-intc@cpu { - compatible = "snps,archs-intc"; - interrupt-controller; - #interrupt-cells = <1>; - }; - - idu_intc: idu-interrupt-controller { - compatible = "snps,archs-idu-intc"; - interrupt-controller; - interrupt-parent = <&cpu_intc>; - - /* - * - * distribution: 0=RR; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3 - */ - #interrupt-cells = <2>; - - /* - * upstream irqs to core intc - downstream these are - * "COMMON" irq 0,1.. - */ - interrupts = <24 25>; - }; - - /* - * this GPIO block ORs all interrupts on CPU card (creg,..) - * to uplink only 1 IRQ to ARC core intc - */ - dw-apb-gpio@0x2000 { - compatible = "snps,dw-apb-gpio"; - reg = < 0x2000 0x80 >; - #address-cells = <1>; - #size-cells = <0>; - - ictl_intc: gpio-controller@0 { - compatible = "snps,dw-apb-gpio-port"; - gpio-controller; - #gpio-cells = <2>; - snps,nr-gpios = <30>; - reg = <0>; - interrupt-controller; - #interrupt-cells = <2>; - interrupt-parent = <&idu_intc>; - - /* - * cmn irq 1 -> cpu irq 25 - * Distribute to cpu0 only - */ - interrupts = <1 1>; - }; - }; - - debug_uart: dw-apb-uart@0x5000 { - compatible = "snps,dw-apb-uart"; - reg = <0x5000 0x100>; - clock-frequency = <33333000>; - interrupt-parent = <&ictl_intc>; - interrupts = <2 4>; - baud = <115200>; - reg-shift = <2>; - reg-io-width = <4>; - }; - - arcpct0: pct { - compatible = "snps,archs-pct"; - #interrupt-cells = <1>; - interrupt-parent = <&cpu_intc>; - interrupts = <20>; - }; - }; - - /* - * This INTC is actually connected to DW APB GPIO - * which acts as a wire between MB INTC and CPU INTC. - * GPIO INTC is configured in platform init code - * and here we mimic direct connection from MB INTC to - * CPU INTC, thus we set "interrupts = <0 1>" instead of - * "interrupts = <12>" - * - * This intc actually resides on MB, but we move it here to - * avoid duplicating the MB dtsi file given that IRQ from - * this intc to cpu intc are different for axs101 and axs103 - */ - mb_intc: dw-apb-ictl@0xe0012000 { - #interrupt-cells = <1>; - compatible = "snps,dw-apb-ictl"; - reg = < 0xe0012000 0x200 >; - interrupt-controller; - interrupt-parent = <&idu_intc>; - interrupts = <0 1>; /* cmn irq 0 -> cpu irq 24 - distribute to cpu0 only */ - }; - - memory { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x00000000 0x80000000 0x40000000>; - device_type = "memory"; - reg = <0x80000000 0x20000000>; /* 512MiB */ - }; -}; diff --git a/target/linux/archs38/dts/axs103_idu.dts b/target/linux/archs38/dts/axs103_idu.dts deleted file mode 100644 index 9c4bf0f28f..0000000000 --- a/target/linux/archs38/dts/axs103_idu.dts +++ /dev/null @@ -1,25 +0,0 @@ -/* - * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/* - * Device Tree for AXS103 SDP with AXS10X Main Board and - * AXC003 FPGA Card (with SMP bitfile) - */ -/dts-v1/; - -/include/ "axc003_idu.dtsi" -/include/ "axs10x_mb.dtsi" - -/ { - model = "Synopsys AXS103 Development Board"; - compatible = "snps,axs103", "snps,arc-sdp"; - - chosen { - bootargs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=ttyS3,115200n8"; - }; -}; diff --git a/target/linux/archs38/dts/axs10x_mb.dtsi b/target/linux/archs38/dts/axs10x_mb.dtsi deleted file mode 100644 index 44a578c107..0000000000 --- a/target/linux/archs38/dts/axs10x_mb.dtsi +++ /dev/null @@ -1,225 +0,0 @@ -/* - * Support for peripherals on the AXS10x mainboard - * - * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/ { - axs10x_mb { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x00000000 0xe0000000 0x10000000>; - interrupt-parent = <&mb_intc>; - - clocks { - i2cclk: i2cclk { - compatible = "fixed-clock"; - clock-frequency = <50000000>; - #clock-cells = <0>; - }; - - apbclk: apbclk { - compatible = "fixed-clock"; - clock-frequency = <50000000>; - #clock-cells = <0>; - }; - - mmcclk: mmcclk { - compatible = "fixed-clock"; - clock-frequency = <50000000>; - #clock-cells = <0>; - }; - }; - - ethernet@0x18000 { - #interrupt-cells = <1>; - compatible = "snps,dwmac"; - reg = < 0x18000 0x2000 >; - interrupts = < 4 >; - interrupt-names = "macirq"; - phy-mode = "rgmii"; - snps,pbl = < 32 >; - clocks = <&apbclk>; - clock-names = "stmmaceth"; - max-speed = <100>; - }; - - ehci@0x40000 { - compatible = "generic-ehci"; - reg = < 0x40000 0x100 >; - interrupts = < 8 >; - }; - - ohci@0x60000 { - compatible = "generic-ohci"; - reg = < 0x60000 0x100 >; - interrupts = < 8 >; - }; - - /* - * According to DW Mobile Storage databook it is required - * to use "Hold Register" if card is enumerated in SDR12 or - * SDR25 modes. - * - * Utilization of "Hold Register" is already implemented via - * dw_mci_pltfm_prepare_command() which in its turn gets - * used through dw_mci_drv_data->prepare_command call-back. - * This call-back is used in Altera Socfpga platform and so - * we may reuse it saying that we're compatible with their - * "altr,socfpga-dw-mshc". - * - * Most probably "Hold Register" utilization is platform- - * independent requirement which means that single unified - * "snps,dw-mshc" should be enough for all users of DW MMC once - * dw_mci_pltfm_prepare_command() is used in generic platform - * code. - */ - mmc@0x15000 { - compatible = "altr,socfpga-dw-mshc"; - reg = < 0x15000 0x400 >; - num-slots = < 1 >; - fifo-depth = < 16 >; - card-detect-delay = < 200 >; - clocks = <&apbclk>, <&mmcclk>; - clock-names = "biu", "ciu"; - interrupts = < 7 >; - bus-width = < 4 >; - }; - - uart@0x20000 { - compatible = "snps,dw-apb-uart"; - reg = <0x20000 0x100>; - clock-frequency = <33333333>; - interrupts = <17>; - baud = <115200>; - reg-shift = <2>; - reg-io-width = <4>; - }; - - uart@0x21000 { - compatible = "snps,dw-apb-uart"; - reg = <0x21000 0x100>; - clock-frequency = <33333333>; - interrupts = <18>; - baud = <115200>; - reg-shift = <2>; - reg-io-width = <4>; - }; - - /* UART muxed with USB data port (ttyS3) */ - uart@0x22000 { - compatible = "snps,dw-apb-uart"; - reg = <0x22000 0x100>; - clock-frequency = <33333333>; - interrupts = <19>; - baud = <115200>; - reg-shift = <2>; - reg-io-width = <4>; - }; - - i2c@0x1d000 { - compatible = "snps,designware-i2c"; - reg = <0x1d000 0x100>; - clock-frequency = <400000>; - clocks = <&i2cclk>; - interrupts = <14>; - }; - - i2c@0x1e000 { - compatible = "snps,designware-i2c"; - reg = <0x1e000 0x100>; - clock-frequency = <400000>; - clocks = <&i2cclk>; - interrupts = <15>; - }; - - i2c@0x1f000 { - compatible = "snps,designware-i2c"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x1f000 0x100>; - clock-frequency = <400000>; - clocks = <&i2cclk>; - interrupts = <16>; - - eeprom@0x54{ - compatible = "24c01"; - reg = <0x54>; - pagesize = <0x8>; - }; - - eeprom@0x57{ - compatible = "24c04"; - reg = <0x57>; - pagesize = <0x8>; - }; - }; - - gpio0:gpio@13000 { - compatible = "snps,dw-apb-gpio"; - reg = <0x13000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - - gpio0_banka: gpio-controller@0 { - compatible = "snps,dw-apb-gpio-port"; - gpio-controller; - #gpio-cells = <2>; - snps,nr-gpios = <32>; - reg = <0>; - }; - - gpio0_bankb: gpio-controller@1 { - compatible = "snps,dw-apb-gpio-port"; - gpio-controller; - #gpio-cells = <2>; - snps,nr-gpios = <8>; - reg = <1>; - }; - - gpio0_bankc: gpio-controller@2 { - compatible = "snps,dw-apb-gpio-port"; - gpio-controller; - #gpio-cells = <2>; - snps,nr-gpios = <8>; - reg = <2>; - }; - }; - - gpio1:gpio@14000 { - compatible = "snps,dw-apb-gpio"; - reg = <0x14000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - - gpio1_banka: gpio-controller@0 { - compatible = "snps,dw-apb-gpio-port"; - gpio-controller; - #gpio-cells = <2>; - snps,nr-gpios = <30>; - reg = <0>; - }; - - gpio1_bankb: gpio-controller@1 { - compatible = "snps,dw-apb-gpio-port"; - gpio-controller; - #gpio-cells = <2>; - snps,nr-gpios = <10>; - reg = <1>; - }; - - gpio1_bankc: gpio-controller@2 { - compatible = "snps,dw-apb-gpio-port"; - gpio-controller; - #gpio-cells = <2>; - snps,nr-gpios = <8>; - reg = <2>; - }; - }; - }; -}; diff --git a/target/linux/archs38/dts/nsim_hs_idu.dts b/target/linux/archs38/dts/nsim_hs_idu.dts deleted file mode 100644 index 75f539bb0d..0000000000 --- a/target/linux/archs38/dts/nsim_hs_idu.dts +++ /dev/null @@ -1,73 +0,0 @@ -/* - * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -/dts-v1/; - -/include/ "skeleton.dtsi" - -/ { - model = "Synopsys ARC HS38 nSIM simulator"; - compatible = "snps,nsim_hs"; - interrupt-parent = <&core_intc>; - - chosen { - bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8"; - }; - - aliases { - serial0 = &arcuart0; - }; - - fpga { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - - /* child and parent address space 1:1 mapped */ - ranges; - - core_intc: core-interrupt-controller { - compatible = "snps,archs-intc"; - interrupt-controller; - #interrupt-cells = <1>; - }; - - idu_intc: idu-interrupt-controller { - compatible = "snps,archs-idu-intc"; - interrupt-controller; - interrupt-parent = <&core_intc>; - - /* - * - * distribution: 0=RR; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3 - */ - #interrupt-cells = <2>; - - /* - * upstream irqs to core intc - downstream these are - * "COMMON" irq 0,1.. - */ - interrupts = <24 25 26 27 28 29 30 31>; - }; - - arcuart0: serial@c0fc1000 { - compatible = "snps,arc-uart"; - reg = <0xc0fc1000 0x100>; - interrupt-parent = <&idu_intc>; - interrupts = <0 0>; - clock-frequency = <80000000>; - current-speed = <115200>; - status = "okay"; - }; - - arcpct0: pct { - compatible = "snps,archs-pct"; - #interrupt-cells = <1>; - interrupts = <20>; - }; - }; -}; diff --git a/target/linux/archs38/dts/skeleton.dtsi b/target/linux/archs38/dts/skeleton.dtsi deleted file mode 100644 index 296d371a33..0000000000 --- a/target/linux/archs38/dts/skeleton.dtsi +++ /dev/null @@ -1,37 +0,0 @@ -/* - * Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/* - * Skeleton device tree; the bare minimum needed to boot; just include and - * add a compatible value. - */ - -/ { - compatible = "snps,arc"; - clock-frequency = <80000000>; /* 80 MHZ */ - #address-cells = <1>; - #size-cells = <1>; - chosen { }; - aliases { }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "snps,arc770d"; - reg = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x80000000 0x10000000>; /* 256M */ - }; -}; diff --git a/target/linux/archs38/image/Makefile b/target/linux/archs38/image/Makefile index 42b13e618d..bda7f3f539 100644 --- a/target/linux/archs38/image/Makefile +++ b/target/linux/archs38/image/Makefile @@ -15,7 +15,7 @@ define Build/calculate-ep endef define Build/patch-dtb - $(call Image/BuildDTB,../dts/$(DEVICE_DTS).dts,$@.dtb) + $(call Image/BuildDTB,$(DTS_DIR)/$(DEVICE_DTS).dts,$@.dtb) $(STAGING_DIR_HOST)/bin/patch-dtb $@ $@.dtb endef -- cgit v1.2.3