From c795794eef8737f6272b2acce9025807af52da81 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Date: Thu, 29 Sep 2016 09:48:09 +0200 Subject: mac80211: use upstream patches for rtl8xxxu MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Also improves rtl8188eu support. Signed-off-by: Álvaro Fernández Rojas --- ...prove-register-description-for-REG_FPGA1_.patch | 30 ++++++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 package/kernel/mac80211/patches/657-0037-rtl8xxxu-Improve-register-description-for-REG_FPGA1_.patch (limited to 'package/kernel/mac80211/patches/657-0037-rtl8xxxu-Improve-register-description-for-REG_FPGA1_.patch') diff --git a/package/kernel/mac80211/patches/657-0037-rtl8xxxu-Improve-register-description-for-REG_FPGA1_.patch b/package/kernel/mac80211/patches/657-0037-rtl8xxxu-Improve-register-description-for-REG_FPGA1_.patch new file mode 100644 index 0000000000..36345fcf00 --- /dev/null +++ b/package/kernel/mac80211/patches/657-0037-rtl8xxxu-Improve-register-description-for-REG_FPGA1_.patch @@ -0,0 +1,30 @@ +From ea2e7a5963f04802d1df3c882e2db30e5e98e434 Mon Sep 17 00:00:00 2001 +From: Jes Sorensen +Date: Fri, 29 Jul 2016 15:57:19 -0400 +Subject: [PATCH] rtl8xxxu: Improve register description for REG_FPGA1_TX_INFO + +This is based on Hal_SetAntenna() from the 8188eu driver + +Signed-off-by: Jes Sorensen +--- + drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h | 9 +++++++++ + 1 file changed, 9 insertions(+) + +--- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h ++++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h +@@ -944,6 +944,15 @@ + #define REG_FPGA1_RF_MODE 0x0900 + + #define REG_FPGA1_TX_INFO 0x090c ++#define FPGA1_TX_ANT_MASK 0x0000000f ++#define FPGA1_TX_ANT_L_MASK 0x000000f0 ++#define FPGA1_TX_ANT_NON_HT_MASK 0x00000f00 ++#define FPGA1_TX_ANT_HT1_MASK 0x0000f000 ++#define FPGA1_TX_ANT_HT2_MASK 0x000f0000 ++#define FPGA1_TX_ANT_HT_S1_MASK 0x00f00000 ++#define FPGA1_TX_ANT_NON_HT_S1_MASK 0x0f000000 ++#define FPGA1_TX_OFDM_TXSC_MASK 0x30000000 ++ + #define REG_ANT_MAPPING1 0x0914 + #define REG_DPDT_CTRL 0x092c /* 8723BU */ + #define REG_RFE_CTRL_ANTA_SRC 0x0930 /* 8723BU */ -- cgit v1.2.3