From c795794eef8737f6272b2acce9025807af52da81 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Date: Thu, 29 Sep 2016 09:48:09 +0200 Subject: mac80211: use upstream patches for rtl8xxxu MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Also improves rtl8188eu support. Signed-off-by: Álvaro Fernández Rojas --- ...xu-Do-not-set-REG_FPGA0_TX_INFO-on-8188eu.patch | 25 ++++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 package/kernel/mac80211/patches/657-0018-rtl8xxxu-Do-not-set-REG_FPGA0_TX_INFO-on-8188eu.patch (limited to 'package/kernel/mac80211/patches/657-0018-rtl8xxxu-Do-not-set-REG_FPGA0_TX_INFO-on-8188eu.patch') diff --git a/package/kernel/mac80211/patches/657-0018-rtl8xxxu-Do-not-set-REG_FPGA0_TX_INFO-on-8188eu.patch b/package/kernel/mac80211/patches/657-0018-rtl8xxxu-Do-not-set-REG_FPGA0_TX_INFO-on-8188eu.patch new file mode 100644 index 0000000000..edbd0b78e1 --- /dev/null +++ b/package/kernel/mac80211/patches/657-0018-rtl8xxxu-Do-not-set-REG_FPGA0_TX_INFO-on-8188eu.patch @@ -0,0 +1,25 @@ +From 3768a83e59924432df99e2242304899ce519e33d Mon Sep 17 00:00:00 2001 +From: Jes Sorensen +Date: Wed, 20 Jul 2016 14:32:46 -0400 +Subject: [PATCH] rtl8xxxu: Do not set REG_FPGA0_TX_INFO on 8188eu + +The vendor driver doesn't set this for 8188eu either. It is unclear if +this is only relevant for gen1 parts. + +Signed-off-by: Jes Sorensen +--- + drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c ++++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c +@@ -3962,7 +3962,8 @@ static int rtl8xxxu_init_device(struct i + goto exit; + + /* RFSW Control - clear bit 14 ?? */ +- if (priv->rtl_chip != RTL8723B && priv->rtl_chip != RTL8192E) ++ if (priv->rtl_chip != RTL8723B && priv->rtl_chip != RTL8192E && ++ priv->rtl_chip != RTL8188E) + rtl8xxxu_write32(priv, REG_FPGA0_TX_INFO, 0x00000003); + + val32 = FPGA0_RF_TRSW | FPGA0_RF_TRSWB | FPGA0_RF_ANTSW | -- cgit v1.2.3