From ada92aee62143b12ffa408edcf52797e8cb8074f Mon Sep 17 00:00:00 2001 From: Gabor Juhos Date: Mon, 5 Dec 2011 18:21:15 +0000 Subject: ar71xx: don't register PCI controller on AR934x if PCIE_RC bit is not set SVN-Revision: 29456 --- target/linux/ar71xx/files/arch/mips/ar71xx/pci.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/pci.c b/target/linux/ar71xx/files/arch/mips/ar71xx/pci.c index 8850c0b6b0..f3c6452418 100644 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/pci.c +++ b/target/linux/ar71xx/files/arch/mips/ar71xx/pci.c @@ -68,6 +68,7 @@ int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin) int __init ar71xx_pci_init(unsigned nr_irqs, struct ar71xx_pci_irq *map) { + u32 t; int ret = 0; switch (ar71xx_soc) { @@ -86,9 +87,13 @@ int __init ar71xx_pci_init(unsigned nr_irqs, struct ar71xx_pci_irq *map) case AR71XX_SOC_AR9342: case AR71XX_SOC_AR9344: - ret = ar724x_pcibios_init(AR934X_IP2_IRQ_PCIE); - break; + t = ar71xx_reset_rr(AR934X_RESET_REG_BOOTSTRAP); + if (t & AR934X_BOOTSTRAP_PCIE_RC) { + ret = ar724x_pcibios_init(AR934X_IP2_IRQ_PCIE); + break; + } + /* fall through */ default: return 0; } -- cgit v1.2.3