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Due to datasheet of rt3883 SoC rgmii1 port handles pins 84-95 and rgmii2 port handles pins 72-83. When this function ports gets added to rt3883_pinmux_data there's wrong pinmux bits set (RT3883_GPIO_MODE_GE1 manages 84-95 pins and RT3883_GPIO_MODE_GE2 manages 72-83). So when enabling rgmii2 as GPIO driver confuses hardware and nothing work, neither rgmii nor gpio.
Also in '0030-pinctrl-ralink-add-pinctrl-driver.patch' typo in name of rgmii2 port.
Signed-off-by: Nick Leiten <nickleiten@gmail.com>
SVN-Revision: 47118
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newer socs have 2 mux registers
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 46952
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keep default as 3.14, mt7621 gic need to be ported to 3.18
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 44349
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