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* ipq806x: switch AP148 to using SMEM based MTD parserJohn Crispin2015-08-176-30/+14
| | | | | | | | | | | | | | *Enable SMEM MTD parser and its dependencies (SMEM & HW spinlocks) in the kernel config *Replaces the MTD layout in DT by the dynamic layout provided by the SMEM parser for AP148 Using the OF based parser is still possible on platforms which have a fixed MTD partition layout. Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 46658
* ipq806x: add QCOM SMEM based MTD parserJohn Crispin2015-08-171-0/+277
| | | | | | | | | This patch adds a new parser which uses the SMEM available on IPQ and some other QCOM platforms to map the MTD partitions. Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 46657
* ipq806x: add SMEM supportJohn Crispin2015-08-173-0/+959
| | | | | | | | | | | | 2 patches are cherry-picked from the following LKML thread: *https://lkml.org/lkml/2015/4/11/208 The last patch (036-soc-qcom-add-smem-to-IPQ806x-platforms.patch) is adding the corresponding DT nodes required for IPQ806x. Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 46656
* ipq806x: add hwspinlock supportJohn Crispin2015-08-1710-15/+480
| | | | | | | | | | | | | | This change cherry-picks the following 3 changes from linux-next: *fb7737 hwspinlock/core: add device tree support *19a0f6 hwspinlock: qcom: Add support for Qualcomm HW Mutex block *bd5717 hwspinlock: qcom: Correct msb in regmap_field We're also adding a patch to add the hardware spinlock device nodes on IPQ806x platforms (033-soc-qcom-Add-sfbp-device-to-IPQ806x-dts.patch). Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 46655
* ipq806x: disable DMA on the SPI flashFelix Fietkau2015-08-134-16/+3
| | | | | | | | | | | | | Previous patch 6f2905eeb6ce5ddec8d12d677e1f377a940b537b enabled ADM in the kernel, which causes a kernel panic when accessing the SPI flash. As a workaround, We'll disable DMA for the flash for now. It was not enabled previously anyway so we'll just leave it as is. Reported-by: Jonas Gorski <jogo@openwrt.org> Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 46587
* ipq806x: add NAND flash controller supportFelix Fietkau2015-08-079-18/+2413
| | | | | | | | | | | | | These patches add support for ipq806x NAND flash controller. Most of these are cherry-picked & backported from LKML: *https://lkml.org/lkml/2015/8/3/16 This patch just modifies the kernel code, but doesn't change the config. It should be harmless. Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 46568
* ipq806x: Add ADM supportFelix Fietkau2015-08-0711-5/+1351
| | | | | | | | | | | | | | | | These are cherry-picked & backported from LKML: *https://lkml.org/lkml/2015/3/17/19 They are enabled on both 3.18 and 4.1 kernel. Patches 150 to 154 are applying changes merged since 3.18; they enable mechanisms used by the ADM driver. ADM engine is used by the NAND controller, so it is necessary to bring-up NAND flash support. Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 46567
* ipq806x: fix freeze in PCIe code when booting with an old u-bootFelix Fietkau2015-08-044-13/+376
| | | | | | | | | | | | | | | | | | | | Old bootloader (same ones which have DT disabled) don't perform any PCIe initialization. The consequence is a freeze during PCIe bring-up on these old u-boot. Same kernel with a newer bootloaders works fine as they contain the corresponding PCIe init code. In this change, we'll add the missing init and make sure the kernel doesn't rely on some preexisting init to get PCIe to work. That includes the following changes: *GPIOs: set function & drive strength *Clocks: add init code for aux & ref clocks *PCIe driver: additional init of the hardware controller Tested 3.18 and 4.1 on an AP148 with bootloader branch 0.0.1 Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 46557
* ipq806x: fix pcie pinmux naming in ipq806x dtsFelix Fietkau2015-08-043-31/+23
| | | | | | | | | | PCIe controller nodes are numbers 0/1/2 in the chipset dtsi file, but the pinmux nodes are numbers 1/2/3. We'll make it consistent by changing the pinmux numbering to match the controller's one. Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 46556
* ipq806x: add support for non-dt enabled ap148 bootloaderFelix Fietkau2015-08-041-0/+14
| | | | | | | | | | | | | | | | | | | Certain AP148 platforms (and derivative) use bootloaders which did not have DT enabled. In order to support these old platforms, we'll now make the following modifications: *explicitely add the memory node in the AP148 DT: this used to be added by new u-boot through a run-time patch mechanism. We'll now add it explicitely so it works on boots which don't support that feature. New boots will have the node twice, the second one will be ignored. *add the zImage generation next to the FIT image for AP148. Other platforms using non-DT enabled bootloaders may want to leverage this zImage code to generate their own firmare as well. Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 46555
* kernel: update 3.18 to 3.18.16Jonas Gorski2015-06-171-9/+0
| | | | | | | | | | | Changelogs: * https://www.kernel.org/pub/linux/kernel/v3.x/ChangeLog-3.18.15 * https://www.kernel.org/pub/linux/kernel/v3.x/ChangeLog-3.18.16 Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 46011
* ipq806x: replace caf nss-gmac driver by upstream stmmacJohn Crispin2015-05-2918-327/+1994
| | | | | | | | | | | | This driver has been cherry-picked and backported from the following LKML thread: *https://lkml.org/lkml/2015/5/26/744 It also updates the DT accordingly. Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 45831
* ipq806x: move arm-gic include into pcie patchJohn Crispin2015-05-292-9/+2
| | | | | | | | | | This include is necessary starting at the PCIe patch, which has a lower number. So in order to keep the patches consistent, we'll move the arm-gic include in the first patch who needs it. Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 45827
* ipq806x: add & enable cpufreq supportJohn Crispin2015-05-2317-1/+3391
| | | | | | | | | | | | | | | This change set enables frequency scaling on ipq806x, which speeds-up the CPU and allows it to achieve its max frequency. These patches are cherry-picked & backported from the following location: *130-132: linux-next *133-143: LKML - https://lkml.org/lkml/2015/3/21/15 *144: derived from other qcom similar dts *145: derived from https://chromium.googlesource.com/chromiumos/third_party/kernel/+/chromeos-3.14/drivers/cpufreq/cpufreq-krait.c Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 45730
* ipq806x: add power regulators supportJohn Crispin2015-05-238-3/+1206
| | | | | | | | | Patches are cherry-picked from linux-next. We're also adding the corresponding config option to the kernel. Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 45729
* ipq806x: disable i2c device on gsbi4John Crispin2015-05-234-4/+57
| | | | | | | | | | | | | | Patch cherry-picked from the following location: https://chromium-review.googlesource.com/#/c/269931/ Disable the i2c device on gsbi4 and mark gsbi4_h and gsbi4_qup clks as unused. If they are enabled, clock framework will turn them off at end of probe. On ipq806x by design gsbi4_qup, gsbi4_h clks and i2c on gsbi4 are meant for RPM usage. So turning them off in kernel is incorrect. Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 45728
* kernel: update 3.18 to 3.18.14Jonas Gorski2015-05-217-50/+10
| | | | | | | | | | | | | | Changelogs: * https://www.kernel.org/pub/linux/kernel/v3.x/ChangeLog-3.18.12 * https://www.kernel.org/pub/linux/kernel/v3.x/ChangeLog-3.18.13 * https://www.kernel.org/pub/linux/kernel/v3.x/ChangeLog-3.18.14 Build tested on brcm63xx and ipq806x, runtested on brcm63xx. Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 45711
* ipq806x: add pcie support to ipq806x based platformsFelix Fietkau2015-05-105-9/+1326
| | | | | | | | | | | | | | This change adds PCIe support to IPQ806x based platforms. The driver is actually cherry-picked from the following LKML thread: *https://lwn.net/Articles/643086/ (patches 110-111) We also add here an additional fix to support multiple PCI controllers on the same platform (patch 112), and to patch the ap148 & dbs149 DTS files (patch 113). Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 45663
* ipq806x: fix boot freeze on zImage kernelFelix Fietkau2015-05-101-0/+72
| | | | | | | | | | | | | | | | | | | | | | | ARCH_QCOM is using the ARCH_MULTIPLATFORM option, as now recommended on most ARM architectures. This automatically calculate ZRELADDR by masking PHYS_OFFSET with 0xf8000000. On IPQ806x though, the first ~20MB of RAM is reserved for the hardware. In newer bootloader, when DT is used, this is not a problem, we just reserve this memory in the device tree. But if the bootloader doesn't have DT support, then ATAGS have to be used. In this case, the ARM decompressor will position the kernel in this low mem, which will not be in the RAM section mapped by the bootloader, which means the kernel will freeze in the middle of the boot process trying to map the memory. As a work around, this patch allows disabling AUTO_ZRELADDR when ARCH_QCOM is selected. It makes the zImage usage possible on bootloaders which don't support device-tree, which is the case on certain early IPQ806x based designs. Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 45661
* ipq806x: add db149 dts filesJohn Crispin2015-04-211-0/+293
| | | | | | | | | DB149 is an IPQ806x based development platform. This patch adds the dts files to support it. Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 45536
* ipq806x: add platform usb supportJohn Crispin2015-04-035-11/+969
| | | | | | | | | | | | | | This change adds DWC3 QCOM USB phys and TCSR drivers. These are cherry-picked from the following LKML threads: *dwc3 qcom: https://lkml.org/lkml/2014/9/12/599 *tcsr: https://lkml.org/lkml/2015/2/9/579 We're also adding an additional patch to add the corresponding dev nodes in the IPQ806x and AP148 dts files. Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 45261
* ipq806x: move 020-add-ap148-bootargs.patch in patches-3.18John Crispin2015-04-011-0/+46
| | | | | | Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 45209
* ipq806x: fix AP148 boot from NORJohn Crispin2015-03-151-0/+35
| | | | | | | | | | | | | | | | This patch allows AP148 to boot from NOR flash. As we're using a FIT image as kernel (which includes kernel bin + DTB) we enable the MTD_SPLIT_FIT_FW kernel option, which will detect the FIT image and automatically split the "firmware" partition into 2 MTD parts (kernel + rootfs). The rootfs will then be parsed and split between rootfs + rootfs_data, as usual. Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 44794
* ipq806x: rename patches in patches-3.18John Crispin2015-03-067-0/+1301
This will allow ipq806x to support multiple kernel version more easily. Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 44616
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