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* kernel: b53: force BCM531x5 port 5 link state if enabledRafał Miłecki2016-09-081-0/+13
| | | | | | | | | | | Some devices (e.g. Tenda AC9 based on BCM47189B0) have BCM53125 with port 5 connected to the second Ethernet interface on the SoC. In such case there is no PHY and we need to force link manually. This assumes port 5 can be marked as enabled for such devices. It's not implemented yet unfortunately. Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
* b53: allow ports with higher numbers than CPU portRafał Miłecki2016-07-241-2/+1
| | | | | | | | | | | | | | Our code was assuming CPU port uses the highest number. My BCM53573 device has eth0 connected to port 8 and eth1 connected to port 5. While working on support for it I tried to: 1) Enable all ports (including port 8) 2) Set CPU port to 5 I noticed port 8 is not accessible anymore. It was just a development process but it seems like something worth fixing anyway. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Jonas Gorski <jonas.gorski@gmail.com>
* kernel: rename B53 symbols to avoid upstream kernel conflictRafał Miłecki2016-06-202-18/+18
| | | | | | | | | In kernel 4.7 there is upstreamed b53 driver using (mostly?) the same symbols as our b53 does. Change our symbols so both drivers can coexist in kernel tree. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Jonas Gorski <jonas.gorski@gmail.com>
* b53: support setting port linkRafał Miłecki2016-02-031-0/+31
| | | | | | | | | When dealing with Broadcom hardware we can simply use swconfig's generic helper, we just need to do some validation of requested state. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> SVN-Revision: 48623
* b53: provide PHY access to swconfigRafał Miłecki2016-02-033-0/+48
| | | | | | | | | Thanks to this change swconfig can access port PHYs e.g. when setting port link state with a generic helper. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> SVN-Revision: 48622
* b53: update header register difinitionsJonas Gorski2016-01-181-1/+2
| | | | | | | | | BCM531x5 has two pontential cpu ports, and header mode can be enabled independently on both. Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 48302
* kernel: b53: fix build with brcm47xxHauke Mehrtens2015-07-031-0/+5
| | | | | | | | | The position of the nvram header file on brcm47xx changed with kernel version 4.1. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 46170
* b53: Allow using all 8 ports on BCM53011Rafał Miłecki2015-06-211-1/+1
| | | | | | | | | | | On two tested devices: Netgear R6250 (BCM53011 rev 2) and Luxul XWC-1000 (BCM53011 rev 3) it was possible to use port 7 and eth1 (instead of port 5 and eth0). It seems BCM53011 just like BCM53012 has 8 ports and usually 3 of them are connected to the SoC. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> SVN-Revision: 46104
* b53: fix memory out of bounds access on 64 bit targetsJonas Gorski2015-06-101-2/+2
| | | | | | | | | | | | | On device reset the sizes for the vlan and port tables were wrongly calculated based on the pointer size instead of the struct size. This causes buffer overruns on 64 bit targets, resulting in panics. Fix this by dereferencing the pointers. Reported-by: Fedor Konstantinov <blmink@mink.su> Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 45938
* b53: widen stp state mask to 3 bits (instead of 2)Jonas Gorski2015-06-101-1/+1
| | | | | | | | | | | | | | | At least on my b53 chip, the mask is 3 bits wide, and because of this some STP states are not set properly and discarded when read. Maybe for some other chips it makes sense to have just 2 bits width, but I don't have other versions around to test/validate. If that's the case then maybe we could add another STP state mask. Signed-off-by: Alexandru Ardelean <ardeleanalex@gmail.com> Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 45937
* b53: Allow using all ports on BCM53012Rafał Miłecki2015-05-121-1/+1
| | | | | | | | | | | | | This chipset has at least 8 usable ports, e.g. Netgear R8000 has ports 5, 7 and 8 connected to Ethernet interfaces: vlan1ports=0 1 2 3 5 7 8* vlan2ports=4 8u Port 6 seems to be always disabled. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 45676
* b53: improve overriding CPU port state on BCM5301XRafał Miłecki2015-04-122-2/+30
| | | | | | | | | | | | | | | | | On BCM5301X there are two different cases to handle: CPU port 8 vs. any other one. Support for CPU port 8 was already partially implemented but it lacked setting some extra bit for 2G speed. It also will need to be extended to implement "SMP dual core 3 GMAC setup". That's the reason for handling it in separated code block. This patch also adds overriding CPU port state for port other than 8. It requires using recently defined GMII_PORT registers. It was tested for regressions on BCM53011 revs 2 & 3. It was also confirmed to fix switch on some internal Broadcom board. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 45402
* b53: clean up code to match kernel style betterJonas Gorski2015-04-106-20/+23
| | | | | | | | | | | | | * properly enclose macro arguments in paranthesis on use * remove trailing white space * convert C99 // comments * add missing blank lines after declaration * remove braces from single statement blocks * split lines > 80 chars (except for one) Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 45356
* b53: define registers available and needed on BCM5301XJonas Gorski2015-04-101-0/+33
| | | | | | | | They are also present on some BCM63xx switches. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> SVN-Revision: 45355
* b53: reverse duplex bit meaning for IMP state override registerJonas Gorski2015-03-181-1/+1
| | | | | | | Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 44875
* b53: global config is part of the management page, not the control pageJonas Gorski2015-03-151-2/+2
| | | | | | | | | | It will now actually enable the mib counters instead of enabling rx/tx for the first switch port. Reported-by: Daniel Gonzalez <dgcbueu@gmail.com> Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 44788
* b53: fix mmap register read/writes > 32 bitJonas Gorski2015-02-271-34/+36
| | | | | | | | | | | | | | | | | | | | | | | For bcm63xx integrated switches, broadcom changed the data endianess to match the system endianess. But this only applies to within one word, which causes 48/64 bit values to be still split into their "litte endian" groups. E.g. 48 bit values (with 5 being the most significant byte) aligned 0x00 ..01 or 0123 0x04 2345 45.. will become 0x00 ..10 resp. 3210 0x04 5432 54.. Likewise for 64 bit values. Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 44568
* b53: hardcode reset GPIO for Linksys WRT300N 1.1Hauke Mehrtens2014-07-061-0/+1
| | | | | | | | | | | | According to the thread https://forum.openwrt.org/viewtopic.php?id=48281 b53 uses GPIO 7: [ 4.470000] b53_common: [DBG] b53_switch_reset_gpio using 7 and causes device to self-reboot. GPIO 8 was found in CFE boot log: "Reset switch via GPIO 8 ..." Signed-off-by: Rafał Miłecki <zajec5@gmail.com> SVN-Revision: 41526
* b53: Make b53_switch_init staticJonas Gorski2014-02-221-1/+1
| | | | | | | | Signed-off-by: Helmut Schaa <helmut.schaa@googlemail.com> Patchwork: http://patchwork.openwrt.org/patch/4869/ Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 39683
* b53: Add BCM53128 switch supportJonas Gorski2014-02-223-2/+18
| | | | | | | | Signed-off-by: Helmut Schaa <helmut.schaa@googlemail.com> Patchwork: http://patchwork.openwrt.org/patch/4867/ Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 39682
* b53: use drvdata to store driver dataHauke Mehrtens2014-01-203-10/+6
| | | | | | | | we should not abuse the platform_data pointer. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 39354
* b53: make b53_switch_reset_gpio() staticHauke Mehrtens2014-01-201-1/+1
| | | | SVN-Revision: 39353
* kernel: b53: fix untagged shift for BCM5365Hauke Mehrtens2013-11-132-4/+8
| | | | | | | | | | | The BCM5365 needs a shift of 7 bits and not 6 bits like the BCM5325 for the untagged ports. Thank you Russell for reporting this and testing the patch. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 38793
* kernel: b53: add initial support for switches in BCM5301XHauke Mehrtens2013-11-102-3/+87
| | | | | | | | This is also known as BCM470{7,8,9}. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 38712
* kernel: b53: add switch name into printk when it fails.Hauke Mehrtens2013-10-061-1/+1
| | | | | | Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 38307
* kernel: b53: add Register Access Bridge Registers (SRAB) interfaceHauke Mehrtens2013-09-253-0/+388
| | | | | | | | The SRAB interface is used on BCM4707 and BCM5301X SoCs. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 38198
* kernel: b53: detect revision of BCM5325Hauke Mehrtens2013-09-152-1/+9
| | | | | | | | | The revision is stored in a different register than it is in other Broadcom switches. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 37995
* kernel: b53: fix vlan write for BCM5325 revison 3+Hauke Mehrtens2013-09-151-2/+7
| | | | | | | | | These switches are integrated in some recent BCM53XX and BCM47XX SoCs like the BCM53572. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 37994
* kernel: b53: use hard coded switch reset gpio on some boards.Hauke Mehrtens2013-09-141-2/+10
| | | | | | | | | | | | The Linksys wrt310n v1 does not have a robo_reset config variable in nvram, but GPIO Pin 8 is the pin needed for resetting the external switch, Linksys hard coded it into their source code. Thank you Devastator for testing. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 37988
* kernel: b53: add soft reset for BCM539x switchesHauke Mehrtens2013-09-142-0/+12
| | | | | | Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 37987
* kernel: b53: support phy ids for BCM5365Jonas Gorski2013-09-052-2/+28
| | | | | | | | | | | | BCM5365 (and probably other older variants) use a different phy id, so the phy driver never attached for them. Fix this by adding the appropriate phy id to the fixup and the phy driver. Reported-by: Russell Senior <russell@personaltelco.net> Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 37906
* kernel: b53: allow access the MIB counters on BCM5365Hauke Mehrtens2013-09-041-1/+1
| | | | | | | | | | b53_no_ops has no elements and b53_port_ops has one element, this makes the code access some random memory when trying to access the mib counter functions. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 37895
* kernel: b53: use devm_gpio_request_one() to request gpioHauke Mehrtens2013-08-011-3/+4
| | | | | | Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 37648
* kernel: b53: add support for GPIO resetHauke Mehrtens2013-08-012-0/+43
| | | | | | | | This is needed for some switches used on bcm47xx SoCs like the one on the Asus RT-N66U. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 37645
* brcm47xx: use b53 phy driver for the switch in kernel 3.10Hauke Mehrtens2013-07-141-0/+5
| | | | | | | | | | This makes it possible to use swconfig to controll the switch. This was tested with devices using b43 and bgmac. This was not tested on devices using tg3. This does not support the adm switch used in some very old devices. SVN-Revision: 37304
* kernel: b53: use correct oops for bcm5365 switchHauke Mehrtens2013-05-091-1/+1
| | | | SVN-Revision: 36589
* generic: b53: clear SM_SW_FWD_MODE unconditionally when enabling VLANJonas Gorski2013-02-211-4/+2
| | | | | | | | | | Setting this bit stops BCM53125 (bgmac actually) from receiving any packets. This bit is cleared conditionally in b53_switch_reset and it seems the same is done in bcmrobo.c which never sets that bit again. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> SVN-Revision: 35723
* generic: b53: remove empty spacesJonas Gorski2013-02-211-2/+2
| | | | | | Signed-off-by: Rafał Miłecki <zajec5@gmail.com> SVN-Revision: 35722
* generic: b53: fix reverted error check in probeJonas Gorski2013-02-101-1/+1
| | | | | | | | | | | | b53_switch_detect returns value returned by b53_read8, which is 0 for success. So fail (and return error) only if b53_switch_detect returned something else than 0. This fixes supported and advertising being zeros for MDIO access. Cc: Jonas Gorski <jogo@openwrt.org> Signed-off-by: Rafał Miłecki <zajec5@gmail.com> SVN-Revision: 35534
* kernel: b53: the b53 spi driver depends on spiHauke Mehrtens2013-01-271-1/+1
| | | | SVN-Revision: 35340
* kernel: remove __devinit, __devexit and __devexit_p for kernel 3.8Hauke Mehrtens2013-01-271-3/+3
| | | | | | These attributes where removed with kernel 3.8 and are now causing compile errors. SVN-Revision: 35328
* generic: add b53 swconfig switch driverJonas Gorski2013-01-239-0/+2943
Add swconfig switch driver for Broadcom BCM53XX switch chips. Supports switches connected through MDIO, SPI or memory mapped registers, and supports BCM5325, BCM539x, BCM531x5 and the BCM63XX internal switch chips. Tested are BCM5325 trough MDIO, BCM53115 through SPI, and BCM6328. Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 35305
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