| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | ar71xx: fix max frame length of the QCA955x SoCs | Gabor Juhos | 2013-12-23 | 1 | -0/+11 |
| | | | | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 39161 | ||||
| * | ar71xx: don't set builtin_switch flag for QCA9558 | Gabor Juhos | 2013-12-23 | 1 | -6/+1 |
| | | | | | | | | | It makes no sense, the SoC has no built-in switch. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 39160 | ||||
| * | ar71xx: allow to use large ethernet frames on AR934x SoCs | Gabor Juhos | 2013-12-20 | 1 | -0/+4 |
| | | | | | | | | | | | | | | | | The hardware supports large ethernet frames. Override the maximum frame length and packet lenght mask in the platform data to allow to use large MTU on the ethernet interfaces. Limit the feature to AR934x SoCs for now. It should work on some other SoCs as well, but those has not been tested yet. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 39149 | ||||
| * | ar71xx: ag71xx: get max_frame_len and desc_pktlen_mask from platform data | Gabor Juhos | 2013-12-20 | 1 | -0/+3 |
| | | | | | | | | | This will allow to use SoC specific values for both. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 39145 | ||||
| * | ar71xx: make ag71xx_mdio_platform_data visible | Gabor Juhos | 2013-12-17 | 1 | -2/+2 |
| | | | | | | | | | | | | This enables us to modify the ag71xx_mdio_platform_data from within the board support files. Signed-off-by: Felix Kaechele <heffer@fedoraproject.org> Patchwork: http://patchwork.openwrt.org/patch/4613/ Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 39126 | ||||
| * | ar71xx: rename ath79_parse_mac_addr to ath79_parse_ascii_mac | Gabor Juhos | 2013-09-20 | 1 | -11/+18 |
| | | | | | | | | | | Rename the function and extend it in order to make it usable from board setup code. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 38085 | ||||
| * | ar71xx: use backported QCA955x patches | Gabor Juhos | 2013-03-04 | 1 | -4/+4 |
| | | | | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 35878 | ||||
| * | ar71xx: fix ethernet device registration for the QCA9556 SoC | Gabor Juhos | 2013-01-29 | 1 | -0/+12 |
| | | | | | | | | | | Based on http://patchwork.openwrt.org/patch/3162/ Signed-off-by: Embedded Wireless GmbH <info at embeddedwireless.de> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 35394 | ||||
| * | ar71xx: fix ethernet device registration for QCA9558 | Gabor Juhos | 2012-12-22 | 1 | -1/+43 |
| | | | | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 34853 | ||||
| * | ar71xx: fixup allowed PHY interface types for QCA9558 | Gabor Juhos | 2012-12-22 | 1 | -2/+23 |
| | | | | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 34851 | ||||
| * | ar71xx: don't assign any MII bus device on QCA9558 by default | Gabor Juhos | 2012-12-22 | 1 | -1/+4 |
| | | | | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 34850 | ||||
| * | ar71xx: add a helper function for setting up ETH_CFG register on AR934x | Gabor Juhos | 2012-10-17 | 1 | -0/+24 |
| | | | | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 33817 | ||||
| * | ar71xx: avoid possible NULL pointer dereference in ath79_init_{,local}_mac | Gabor Juhos | 2012-09-27 | 1 | -2/+8 |
| | | | | | SVN-Revision: 33575 | ||||
| * | ar71xx: use dynamic clock dividers on the 2nd MDIO of AR934x | Gabor Juhos | 2012-09-09 | 1 | -0/+33 |
| | | | | | SVN-Revision: 33343 | ||||
| * | Revert "ar71xx: only allow RGMII mode on the 2nd ethernet MAC of the AR7240" | Gabor Juhos | 2012-08-29 | 1 | -8/+1 |
| | | | | | | | That was based on assumptions. SVN-Revision: 33310 | ||||
| * | ar71xx: only allow RGMII mode on the 2nd ethernet MAC of the AR7240 | Gabor Juhos | 2012-08-27 | 1 | -1/+8 |
| | | | | | | | Signed-off-by: Daniel Golle <dgolle@allnet.de> SVN-Revision: 33280 | ||||
| * | ar71xx: add initial support for the QCA955X SoCs | Gabor Juhos | 2012-07-05 | 1 | -1/+9 |
| | | | | | SVN-Revision: 32606 | ||||
| * | ar71xx: add a helper function for setting up PHY4 swapping on ar933x | Felix Fietkau | 2012-06-06 | 1 | -0/+18 |
| | | | | | SVN-Revision: 32092 | ||||
| * | ar71xx: fix MII clock settings for various chips, improves ethernet ↵ | Felix Fietkau | 2012-05-27 | 1 | -2/+10 |
| | | | | | | | stability on AR934x SVN-Revision: 31925 | ||||
| * | ar71xx: allow to disable link polling on unused PHYs | Gabor Juhos | 2012-04-29 | 1 | -0/+4 |
| | | | | | SVN-Revision: 31533 | ||||
| * | ar71xx: add AR934x specific interface speed setup for ge0 | Gabor Juhos | 2012-03-19 | 1 | -4/+9 |
| | | | | | SVN-Revision: 31017 | ||||
| * | ar71xx: reset the switch on AR934x before ethernet device registration | Gabor Juhos | 2012-03-13 | 1 | -0/+4 |
| | | | | | SVN-Revision: 30922 | ||||
| * | ar71xx: use a dummy callback for interfaces with fixed speed | Gabor Juhos | 2012-03-12 | 1 | -28/+7 |
| | | | | | SVN-Revision: 30913 | ||||
| * | ar71xx: merge ar934x_bo_ddr_flush patch | Gabor Juhos | 2012-03-12 | 1 | -12/+5 |
| | | | | | SVN-Revision: 30912 | ||||
| * | ar71xx: merge files-3.2 to files | Gabor Juhos | 2012-02-10 | 1 | -0/+971 |
| SVN-Revision: 30405 | |||||
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index : openwrt/em-br6478acv2/lede/master-31e0f0ae | |
| Edimax BR-6578AC V2 base from https://github.com/ulli-kroll/lede.git | James |
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