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-rw-r--r--target/linux/xburst/patches-2.6.32/050-nand.patch88
1 files changed, 88 insertions, 0 deletions
diff --git a/target/linux/xburst/patches-2.6.32/050-nand.patch b/target/linux/xburst/patches-2.6.32/050-nand.patch
new file mode 100644
index 0000000000..af53c322d9
--- /dev/null
+++ b/target/linux/xburst/patches-2.6.32/050-nand.patch
@@ -0,0 +1,88 @@
+From 436aee004fda70b654698aff99427abdebf6bdb9 Mon Sep 17 00:00:00 2001
+From: Lars-Peter Clausen <lars@metafoo.de>
+Date: Mon, 11 Jan 2010 04:29:37 +0100
+Subject: [PATCH] /opt/Projects/openwrt/target/linux/xburst/patches-2.6.31/050-nand.patch
+
+---
+ drivers/mtd/nand/Kconfig | 6 ++++++
+ drivers/mtd/nand/Makefile | 1 +
+ drivers/mtd/nand/nand_base.c | 19 +++++++------------
+ 3 files changed, 14 insertions(+), 12 deletions(-)
+
+diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
+index 2fda0b6..8b28828 100644
+--- a/drivers/mtd/nand/Kconfig
++++ b/drivers/mtd/nand/Kconfig
+@@ -482,4 +482,10 @@ config MTD_NAND_W90P910
+ This enables the driver for the NAND Flash on evaluation board based
+ on w90p910.
+
++config MTD_NAND_JZ4740
++ tristate "Support NAND Flash device on Jz4740 board"
++ depends on SOC_JZ4740
++ help
++ Support NAND Flash device on Jz4740 board
++
+ endif # MTD_NAND
+diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
+index 6950d3d..1661534 100644
+--- a/drivers/mtd/nand/Makefile
++++ b/drivers/mtd/nand/Makefile
+@@ -42,5 +42,6 @@ obj-$(CONFIG_MTD_NAND_SOCRATES) += socrates_nand.o
+ obj-$(CONFIG_MTD_NAND_TXX9NDFMC) += txx9ndfmc.o
+ obj-$(CONFIG_MTD_NAND_W90P910) += w90p910_nand.o
+ obj-$(CONFIG_MTD_NAND_NOMADIK) += nomadik_nand.o
++obj-$(CONFIG_MTD_NAND_JZ4740) += jz4740_nand.o
+
+ nand-objs := nand_base.o nand_bbt.o
+diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
+index 2957cc7..33ed710 100644
+--- a/drivers/mtd/nand/nand_base.c
++++ b/drivers/mtd/nand/nand_base.c
+@@ -956,29 +956,22 @@ static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
+ uint8_t *ecc_calc = chip->buffers->ecccalc;
+ uint8_t *ecc_code = chip->buffers->ecccode;
+ uint32_t *eccpos = chip->ecc.layout->eccpos;
+-
+- for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
+- chip->ecc.hwctl(mtd, NAND_ECC_READ);
+- chip->read_buf(mtd, p, eccsize);
+- chip->ecc.calculate(mtd, p, &ecc_calc[i]);
+- }
+- chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
++ int stat;
+
+ for (i = 0; i < chip->ecc.total; i++)
+ ecc_code[i] = chip->oob_poi[eccpos[i]];
+
+- eccsteps = chip->ecc.steps;
+- p = buf;
+-
+- for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
+- int stat;
+
++ for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
++ chip->ecc.hwctl(mtd, NAND_ECC_READ);
++ chip->read_buf(mtd, p, eccsize);
+ stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
+ if (stat < 0)
+ mtd->ecc_stats.failed++;
+ else
+ mtd->ecc_stats.corrected += stat;
+ }
++
+ return 0;
+ }
+
+@@ -1178,6 +1171,8 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
+ bufpoi = aligned ? buf : chip->buffers->databuf;
+
+ if (likely(sndcmd)) {
++ chip->cmdfunc(mtd, NAND_CMD_READOOB, 0x00, page);
++ chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
+ chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
+ sndcmd = 0;
+ }
+--
+1.5.6.5
+