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-rw-r--r--target/linux/mvebu/patches-3.10/0137-mtd-nand-pxa3xx-Split-FIFO-size-from-to-be-read-FIFO.patch74
1 files changed, 0 insertions, 74 deletions
diff --git a/target/linux/mvebu/patches-3.10/0137-mtd-nand-pxa3xx-Split-FIFO-size-from-to-be-read-FIFO.patch b/target/linux/mvebu/patches-3.10/0137-mtd-nand-pxa3xx-Split-FIFO-size-from-to-be-read-FIFO.patch
deleted file mode 100644
index e00921d40f..0000000000
--- a/target/linux/mvebu/patches-3.10/0137-mtd-nand-pxa3xx-Split-FIFO-size-from-to-be-read-FIFO.patch
+++ /dev/null
@@ -1,74 +0,0 @@
-From 496f307424d3958ef43ad06ae6a0be98ede2a92c Mon Sep 17 00:00:00 2001
-From: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
-Date: Thu, 7 Nov 2013 12:17:16 -0300
-Subject: [PATCH 137/203] mtd: nand: pxa3xx: Split FIFO size from to-be-read
- FIFO count
-
-Introduce a fifo_size field to represent the size of the controller's
-FIFO buffer, and use it to distinguish that size from the amount
-of data bytes to be read from the FIFO.
-
-This is important to support devices with pages larger than the
-controller's internal FIFO, that need to read the pages in FIFO-sized
-chunks.
-
-In particular, the current code is at least confusing, for it mixes
-all the different sizes involved: FIFO size, page size and data size.
-
-This commit starts the cleaning by removing the info->page_size field
-that is not currently used. The host->page_size field should also
-be removed and use always mtd->writesize instead. Follow up commits
-will clean this up.
-
-Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
-Tested-by: Daniel Mack <zonque@gmail.com>
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
----
- drivers/mtd/nand/pxa3xx_nand.c | 12 +++++++-----
- 1 file changed, 7 insertions(+), 5 deletions(-)
-
---- a/drivers/mtd/nand/pxa3xx_nand.c
-+++ b/drivers/mtd/nand/pxa3xx_nand.c
-@@ -201,8 +201,8 @@ struct pxa3xx_nand_info {
- int use_spare; /* use spare ? */
- int is_ready;
-
-- unsigned int page_size; /* page size of attached chip */
-- unsigned int data_size; /* data size in FIFO */
-+ unsigned int fifo_size; /* max. data size in the FIFO */
-+ unsigned int data_size; /* data to be read from FIFO */
- unsigned int oob_size;
- int retcode;
-
-@@ -307,16 +307,15 @@ static void pxa3xx_nand_set_timing(struc
-
- static void pxa3xx_set_datasize(struct pxa3xx_nand_info *info)
- {
-- struct pxa3xx_nand_host *host = info->host[info->cs];
- int oob_enable = info->reg_ndcr & NDCR_SPARE_EN;
-
-- info->data_size = host->page_size;
-+ info->data_size = info->fifo_size;
- if (!oob_enable) {
- info->oob_size = 0;
- return;
- }
-
-- switch (host->page_size) {
-+ switch (info->fifo_size) {
- case 2048:
- info->oob_size = (info->use_ecc) ? 40 : 64;
- break;
-@@ -933,9 +932,12 @@ static int pxa3xx_nand_detect_config(str
- uint32_t ndcr = nand_readl(info, NDCR);
-
- if (ndcr & NDCR_PAGE_SZ) {
-+ /* Controller's FIFO size */
-+ info->fifo_size = 2048;
- host->page_size = 2048;
- host->read_id_bytes = 4;
- } else {
-+ info->fifo_size = 512;
- host->page_size = 512;
- host->read_id_bytes = 2;
- }