diff options
Diffstat (limited to 'target/linux/mpc83xx/patches/003-esdhc_wp-inverted_property.patch')
| -rw-r--r-- | target/linux/mpc83xx/patches/003-esdhc_wp-inverted_property.patch | 113 |
1 files changed, 113 insertions, 0 deletions
diff --git a/target/linux/mpc83xx/patches/003-esdhc_wp-inverted_property.patch b/target/linux/mpc83xx/patches/003-esdhc_wp-inverted_property.patch new file mode 100644 index 0000000000..50c199a4db --- /dev/null +++ b/target/linux/mpc83xx/patches/003-esdhc_wp-inverted_property.patch @@ -0,0 +1,113 @@ +From 50dfe70fe9e216cf356830194630f9a39e498d76 Mon Sep 17 00:00:00 2001 +From: Anton Vorontsov <avorontsov@ru.mvista.com> +Date: Tue, 22 Sep 2009 16:45:14 -0700 +Subject: [PATCH] powerpc: introduce and document sdhci,wp-inverted property for eSDHC + +eSDHC block in MPC837x SOCs reports inverted write-protect state, soon +sdhci-of driver will look for sdhci,wp-inverted properties to decide +whether apply a specific quirk. + +So, document the property and add it to device tree source files. + +Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> +Cc: Pierre Ossman <pierre@ossman.eu> +Cc: Kumar Gala <galak@kernel.crashing.org> +Cc: David Vrabel <david.vrabel@csr.com> +Cc: Ben Dooks <ben@fluff.org> +Cc: Sascha Hauer <s.hauer@pengutronix.de> +Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> +Cc: <linux-mmc@vger.kernel.org> +Signed-off-by: Andrew Morton <akpm@linux-foundation.org> +Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org> +--- + Documentation/powerpc/dts-bindings/fsl/esdhc.txt | 2 ++ + arch/powerpc/boot/dts/mpc8377_mds.dts | 1 + + arch/powerpc/boot/dts/mpc8377_rdb.dts | 1 + + arch/powerpc/boot/dts/mpc8377_wlan.dts | 1 + + arch/powerpc/boot/dts/mpc8378_mds.dts | 1 + + arch/powerpc/boot/dts/mpc8378_rdb.dts | 1 + + arch/powerpc/boot/dts/mpc8379_mds.dts | 1 + + arch/powerpc/boot/dts/mpc8379_rdb.dts | 1 + + 8 files changed, 9 insertions(+), 0 deletions(-) + +--- a/Documentation/powerpc/dts-bindings/fsl/esdhc.txt ++++ b/Documentation/powerpc/dts-bindings/fsl/esdhc.txt +@@ -10,6 +10,8 @@ Required properties: + - interrupts : should contain eSDHC interrupt. + - interrupt-parent : interrupt source phandle. + - clock-frequency : specifies eSDHC base clock frequency. ++ - sdhci,wp-inverted : (optional) specifies that eSDHC controller ++ reports inverted write-protect state; + - sdhci,1-bit-only : (optional) specifies that a controller can + only handle 1-bit data transfers. + +--- a/arch/powerpc/boot/dts/mpc8377_mds.dts ++++ b/arch/powerpc/boot/dts/mpc8377_mds.dts +@@ -159,6 +159,7 @@ + reg = <0x2e000 0x1000>; + interrupts = <42 0x8>; + interrupt-parent = <&ipic>; ++ sdhci,wp-inverted; + /* Filled in by U-Boot */ + clock-frequency = <0>; + }; +--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts ++++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts +@@ -173,6 +173,7 @@ + reg = <0x2e000 0x1000>; + interrupts = <42 0x8>; + interrupt-parent = <&ipic>; ++ sdhci,wp-inverted; + /* Filled in by U-Boot */ + clock-frequency = <0>; + }; +--- a/arch/powerpc/boot/dts/mpc8377_wlan.dts ++++ b/arch/powerpc/boot/dts/mpc8377_wlan.dts +@@ -150,6 +150,7 @@ + reg = <0x2e000 0x1000>; + interrupts = <42 0x8>; + interrupt-parent = <&ipic>; ++ sdhci,wp-inverted; + clock-frequency = <133333333>; + }; + }; +--- a/arch/powerpc/boot/dts/mpc8378_mds.dts ++++ b/arch/powerpc/boot/dts/mpc8378_mds.dts +@@ -159,6 +159,7 @@ + reg = <0x2e000 0x1000>; + interrupts = <42 0x8>; + interrupt-parent = <&ipic>; ++ sdhci,wp-inverted; + /* Filled in by U-Boot */ + clock-frequency = <0>; + }; +--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts ++++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts +@@ -173,6 +173,7 @@ + reg = <0x2e000 0x1000>; + interrupts = <42 0x8>; + interrupt-parent = <&ipic>; ++ sdhci,wp-inverted; + /* Filled in by U-Boot */ + clock-frequency = <0>; + }; +--- a/arch/powerpc/boot/dts/mpc8379_mds.dts ++++ b/arch/powerpc/boot/dts/mpc8379_mds.dts +@@ -157,6 +157,7 @@ + reg = <0x2e000 0x1000>; + interrupts = <42 0x8>; + interrupt-parent = <&ipic>; ++ sdhci,wp-inverted; + /* Filled in by U-Boot */ + clock-frequency = <0>; + }; +--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts ++++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts +@@ -171,6 +171,7 @@ + reg = <0x2e000 0x1000>; + interrupts = <42 0x8>; + interrupt-parent = <&ipic>; ++ sdhci,wp-inverted; + /* Filled in by U-Boot */ + clock-frequency = <0>; + }; |