1 files changed, 0 insertions, 74 deletions
diff --git a/target/linux/mediatek/patches-4.4/0075-clk-mediatek-enable-critical-clocks.patch b/target/linux/mediatek/patches-4.4/0075-clk-mediatek-enable-critical-clocks.patch
deleted file mode 100644
index fe0c366c85..0000000000
--- a/target/linux/mediatek/patches-4.4/0075-clk-mediatek-enable-critical-clocks.patch
+++ /dev/null
@@ -1,74 +0,0 @@
-From b7a101f53b7cb0e05658e04accf9fd12512b5735 Mon Sep 17 00:00:00 2001
-From: John Crispin <blogic@openwrt.org>
-Date: Thu, 31 Mar 2016 06:46:51 +0200
-Subject: [PATCH 75/78] clk: mediatek: enable critical clocks
-
-Signed-off-by: John Crispin <blogic@openwrt.org>
----
- drivers/clk/mediatek/clk-mt2701.c |   22 ++++++++++++++++++++--
- 1 file changed, 20 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/clk/mediatek/clk-mt2701.c b/drivers/clk/mediatek/clk-mt2701.c
-index 812b347..1634288 100644
---- a/drivers/clk/mediatek/clk-mt2701.c
-+++ b/drivers/clk/mediatek/clk-mt2701.c
-@@ -573,6 +573,20 @@ static const struct mtk_gate top_clks[] __initconst = {
- 	GATE_TOP_AUD(CLK_TOP_AUD_I2S6_MCLK, "aud_i2s6_mclk", "aud_k6_src_div", 28),
- };
- 
-+static struct clk_onecell_data *mt7623_top_clk_data __initdata;
-+static struct clk_onecell_data *mt7623_pll_clk_data __initdata;
-+
-+static void __init mtk_clk_enable_critical(void)
-+{
-+	if (!mt7623_top_clk_data || !mt7623_pll_clk_data)
-+		return;
-+
-+	clk_prepare_enable(mt7623_pll_clk_data->clks[CLK_APMIXED_ARMPLL]);
-+	clk_prepare_enable(mt7623_top_clk_data->clks[CLK_TOP_MEM_SEL]);
-+	clk_prepare_enable(mt7623_top_clk_data->clks[CLK_TOP_DDRPHYCFG_SEL]);
-+	clk_prepare_enable(mt7623_top_clk_data->clks[CLK_TOP_RTC_SEL]);
-+}
-+
- static void __init mtk_topckgen_init(struct device_node *node)
- {
- 	struct clk_onecell_data *clk_data;
-@@ -585,7 +599,7 @@ static void __init mtk_topckgen_init(struct device_node *node)
- 		return;
- 	}
- 
--	clk_data = mtk_alloc_clk_data(CLK_TOP_NR);
-+	mt7623_top_clk_data = clk_data = mtk_alloc_clk_data(CLK_TOP_NR);
- 
- 	mtk_clk_register_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_clks),
- 								clk_data);
-@@ -606,6 +620,8 @@ static void __init mtk_topckgen_init(struct device_node *node)
- 	if (r)
- 		pr_err("%s(): could not register clock provider: %d\n",
- 			__func__, r);
-+
-+	mtk_clk_enable_critical();
- }
- CLK_OF_DECLARE(mtk_topckgen, "mediatek,mt2701-topckgen", mtk_topckgen_init);
- 
-@@ -1202,7 +1218,7 @@ static void __init mtk_apmixedsys_init(struct device_node *node)
- 	struct clk_onecell_data *clk_data;
- 	int r;
- 
--	clk_data = mtk_alloc_clk_data(ARRAY_SIZE(apmixed_plls));
-+	mt7623_pll_clk_data = clk_data = mtk_alloc_clk_data(ARRAY_SIZE(apmixed_plls));
- 	if (!clk_data)
- 		return;
- 
-@@ -1213,6 +1229,8 @@ static void __init mtk_apmixedsys_init(struct device_node *node)
- 	if (r)
- 		pr_err("%s(): could not register clock provider: %d\n",
- 			__func__, r);
-+
-+	mtk_clk_enable_critical();
- }
- CLK_OF_DECLARE(mtk_apmixedsys, "mediatek,mt2701-apmixedsys",
- 							mtk_apmixedsys_init);
--- 
-1.7.10.4
-