diff options
Diffstat (limited to 'target/linux/coldfire/patches/067-mcfv4e_acr_cleanup.patch')
| -rw-r--r-- | target/linux/coldfire/patches/067-mcfv4e_acr_cleanup.patch | 112 |
1 files changed, 0 insertions, 112 deletions
diff --git a/target/linux/coldfire/patches/067-mcfv4e_acr_cleanup.patch b/target/linux/coldfire/patches/067-mcfv4e_acr_cleanup.patch deleted file mode 100644 index 3a0736c8af..0000000000 --- a/target/linux/coldfire/patches/067-mcfv4e_acr_cleanup.patch +++ /dev/null @@ -1,112 +0,0 @@ -From ddc092180bd24b34afdd6fd7cd48b77b55a5bd5e Mon Sep 17 00:00:00 2001 -From: Kurt Mahan <kmahan@freescale.com> -Date: Tue, 24 Jun 2008 23:21:07 -0600 -Subject: [PATCH] Cleanup ACR mappings and document. - -LTIBName: mcfv4e-acr-cleanup -Signed-off-by: Kurt Mahan <kmahan@freescale.com> ---- - arch/m68k/coldfire/head.S | 81 +++++++++++++++++++++++++------------------- - 1 files changed, 46 insertions(+), 35 deletions(-) - ---- a/arch/m68k/coldfire/head.S -+++ b/arch/m68k/coldfire/head.S -@@ -53,52 +53,63 @@ - #define __FINIT .previous - #endif - --/* JKM -- REVISE DOCS FOR M547x_8x and PHYS MAPPING */ -+#if CONFIG_SDRAM_BASE != PAGE_OFFSET - /* -- * Setup ACR mappings to provide the following memory map: -- * Data -- * 0xA0000000 -> 0xAFFFFFFF [0] NO CACHE / PRECISE / SUPER ONLY -- * 0xF0000000 -> 0xFFFFFFFF [1] NO CACHE / PRECISE / SUPER ONLY -- * Code -- * None currently (mapped via TLBs) -+ * Kernel mapped to virtual ram address. -+ * -+ * M5445x: -+ * Data[0]: 0xF0000000 -> 0xFFFFFFFF System regs -+ * Data[1]: 0xA0000000 -> 0xAFFFFFFF PCI -+ * Code[0]: Not Mapped -+ * Code[1]: Not Mapped -+ * -+ * M547x/M548x -+ * Data[0]: 0xF0000000 -> 0xFFFFFFFF System regs -+ * Data[1]: Not Mapped -+ * Code[0]: Not Mapped -+ * Code[1]: Not Mapped - */ -- --#if CONFIG_SDRAM_BASE != PAGE_OFFSET - #if defined(CONFIG_M5445X) --#if 0 --#define ACR0_DEFAULT #0xA00FA048 /* ACR0 default value */ --#endif --#define ACR0_DEFAULT #0x400FA028 /* ACR0 default value */ --#define ACR1_DEFAULT #0xF00FA040 /* ACR1 default value */ --#if 0 --#define ACR2_DEFAULT #0x00000000 /* ACR2 default value */ --#endif --#define ACR2_DEFAULT #0x400FA028 /* ACR2 default value */ --#define ACR3_DEFAULT #0x00000000 /* ACR3 default value */ --/* ACR mapping for FPGA (maps 0) */ --#define ACR0_FPGA #0x000FA048 /* ACR0 enable FPGA */ -+#define ACR0_DEFAULT #0xF00FA048 /* System regs */ -+#define ACR1_DEFAULT #0xA00FA048 /* PCI */ -+#define ACR2_DEFAULT #0x00000000 /* Not Mapped */ -+#define ACR3_DEFAULT #0x00000000 /* Not Mapped */ - #elif defined(CONFIG_M547X_8X) --#define ACR0_DEFAULT #0xE000C040 /* ACR0 default value */ --#define ACR1_DEFAULT #0x00000000 /* ACR1 default value */ --#define ACR2_DEFAULT #0x00000000 /* ACR2 default value */ --#define ACR3_DEFAULT #0x00000000 /* ACR3 default value */ -+#define ACR0_DEFAULT #0xF00FA048 /* System Regs */ -+#define ACR1_DEFAULT #0x00000000 /* Not Mapped */ -+#define ACR2_DEFAULT #0x00000000 /* Not Mapped */ -+#define ACR3_DEFAULT #0x00000000 /* Not Mapped */ - #endif - --#else -+#else /* CONFIG_SDRAM_BASE = PAGE_OFFSET */ -+/* -+ * Kernel mapped to physical ram address. -+ * -+ * M5445x: -+ * Data[0]: 0xF0000000 -> 0xFFFFFFFF System regs -+ * Data[1]: 0x40000000 -> 0x4FFFFFFF SDRAM - uncached -+ * Code[0]: Not Mapped -+ * Code[1]: 0x40000000 -> 0x4FFFFFFF SDRAM - cached -+ * -+ * M547x/M548x -+ * Data[0]: 0xF0000000 -> 0xFFFFFFFF System regs -+ * Data[1]: 0x00000000 -> 0x0FFFFFFF SDRAM - uncached -+ * Code[0]: Not Mapped -+ * Code[1]: 0x00000000 -> 0x0FFFFFFF SDRAM - cached -+ */ - #if defined(CONFIG_M5445X) --#define ACR0_DEFAULT #0xF00FC040 /* ACR0 default value */ --#define ACR1_DEFAULT #0x400FA008 /* ACR1 default value */ --#define ACR2_DEFAULT #0x00000000 /* ACR2 default value */ --#define ACR3_DEFAULT #0x400FA008 /* ACR3 default value */ -+#define ACR0_DEFAULT #0xF00FA048 /* System Regs */ -+#define ACR1_DEFAULT #0x400FA048 /* SDRAM uncached */ -+#define ACR2_DEFAULT #0x00000000 /* Not mapped */ -+#define ACR3_DEFAULT #0x400FA008 /* SDRAM cached */ - #elif defined(CONFIG_M547X_8X) --#define ACR0_DEFAULT #0xF00FC040 /* ACR0 default value */ --#define ACR1_DEFAULT #0x000FA008 /* ACR1 default value */ --#define ACR2_DEFAULT #0x00000000 /* ACR2 default value */ --#define ACR3_DEFAULT #0x000FA008 /* ACR3 default value */ -+#define ACR0_DEFAULT #0xF00FA048 /* System Regs */ -+#define ACR1_DEFAULT #0x000FA048 /* SDRAM uncached */ -+#define ACR2_DEFAULT #0x00000000 /* Not mapped */ -+#define ACR3_DEFAULT #0x000FA008 /* SDRAM cached */ - #endif - #endif - -- - /* Several macros to make the writing of subroutines easier: - * - func_start marks the beginning of the routine which setups the frame - * register and saves the registers, it also defines another macro |