diff options
Diffstat (limited to 'target/linux/brcm2708/patches-4.4/0256-clk-bcm2835-pll_off-should-only-update-CM_PLL_ANARST.patch')
| -rw-r--r-- | target/linux/brcm2708/patches-4.4/0256-clk-bcm2835-pll_off-should-only-update-CM_PLL_ANARST.patch | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/target/linux/brcm2708/patches-4.4/0256-clk-bcm2835-pll_off-should-only-update-CM_PLL_ANARST.patch b/target/linux/brcm2708/patches-4.4/0256-clk-bcm2835-pll_off-should-only-update-CM_PLL_ANARST.patch new file mode 100644 index 0000000000..898f41a76c --- /dev/null +++ b/target/linux/brcm2708/patches-4.4/0256-clk-bcm2835-pll_off-should-only-update-CM_PLL_ANARST.patch @@ -0,0 +1,43 @@ +From 2083f21dc65df8ce4fd887acd815551058b23e3e Mon Sep 17 00:00:00 2001 +From: Martin Sperl <kernel@martin.sperl.org> +Date: Mon, 29 Feb 2016 11:39:17 +0000 +Subject: [PATCH 256/304] clk: bcm2835: pll_off should only update + CM_PLL_ANARST + +bcm2835_pll_off is currently assigning CM_PLL_ANARST to the control +register, which may lose the other bits that are currently set by the +clock dividers. + +It also now locks during the read/modify/write cycle of both +registers. + +Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the +audio domain clocks") + +Signed-off-by: Martin Sperl <kernel@martin.sperl.org> +Signed-off-by: Eric Anholt <eric@anholt.net> +Reviewed-by: Eric Anholt <eric@anholt.net> +(cherry picked from commit 6727f086cfe4ddcc651eb2bf4301abfcf619be06) +--- + drivers/clk/bcm/clk-bcm2835.c | 10 ++++++++-- + 1 file changed, 8 insertions(+), 2 deletions(-) + +--- a/drivers/clk/bcm/clk-bcm2835.c ++++ b/drivers/clk/bcm/clk-bcm2835.c +@@ -913,8 +913,14 @@ static void bcm2835_pll_off(struct clk_h + struct bcm2835_cprman *cprman = pll->cprman; + const struct bcm2835_pll_data *data = pll->data; + +- cprman_write(cprman, data->cm_ctrl_reg, CM_PLL_ANARST); +- cprman_write(cprman, data->a2w_ctrl_reg, A2W_PLL_CTRL_PWRDN); ++ spin_lock(&cprman->regs_lock); ++ cprman_write(cprman, data->cm_ctrl_reg, ++ cprman_read(cprman, data->cm_ctrl_reg) | ++ CM_PLL_ANARST); ++ cprman_write(cprman, data->a2w_ctrl_reg, ++ cprman_read(cprman, data->a2w_ctrl_reg) | ++ A2W_PLL_CTRL_PWRDN); ++ spin_unlock(&cprman->regs_lock); + } + + static int bcm2835_pll_on(struct clk_hw *hw) |