summaryrefslogtreecommitdiffstats
path: root/target/linux/brcm2708/patches-4.4/0238-BCM270X_DT-Add-dpi24-overlay.patch
diff options
context:
space:
mode:
Diffstat (limited to 'target/linux/brcm2708/patches-4.4/0238-BCM270X_DT-Add-dpi24-overlay.patch')
-rw-r--r--target/linux/brcm2708/patches-4.4/0238-BCM270X_DT-Add-dpi24-overlay.patch74
1 files changed, 74 insertions, 0 deletions
diff --git a/target/linux/brcm2708/patches-4.4/0238-BCM270X_DT-Add-dpi24-overlay.patch b/target/linux/brcm2708/patches-4.4/0238-BCM270X_DT-Add-dpi24-overlay.patch
new file mode 100644
index 0000000000..7b5fc16fcc
--- /dev/null
+++ b/target/linux/brcm2708/patches-4.4/0238-BCM270X_DT-Add-dpi24-overlay.patch
@@ -0,0 +1,74 @@
+From 3533e797aaf506f1e81a3b53bf04ce9592005756 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Tue, 5 Apr 2016 13:01:54 +0100
+Subject: [PATCH 238/304] BCM270X_DT: Add dpi24 overlay
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ arch/arm/boot/dts/overlays/README | 8 +++++++
+ arch/arm/boot/dts/overlays/dpi24-overlay.dts | 31 ++++++++++++++++++++++++++++
+ 3 files changed, 40 insertions(+)
+ create mode 100644 arch/arm/boot/dts/overlays/dpi24-overlay.dts
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -15,6 +15,7 @@ endif
+ dtbo-$(RPI_DT_OVERLAYS) += ads7846.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += at86rf233.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += bmp085_i2c-sensor.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += dpi24.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += dwc2.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += dwc-otg.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += dht11.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -213,6 +213,14 @@ Params: gpiopin GPIO con
+ (default 4)
+
+
++Name: dpi24
++Info: Overlay for a generic 24-bit DPI display
++ This uses GPIOs 0-27 (so no I2C, uart etc.), and activates the output
++ 2-3 seconds after the kernel has started.
++Load: dtoverlay=dpi24
++Params: <None>
++
++
+ Name: dwc-otg
+ Info: Selects the dwc_otg USB controller driver which has fiq support. This
+ is the default on all except the Pi Zero which defaults to dwc2.
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/dpi24-overlay.dts
+@@ -0,0 +1,31 @@
++/dts-v1/;
++/plugin/;
++
++/{
++ compatible = "brcm,bcm2708";
++
++ // There is no DPI driver module, but we need a platform device
++ // node (that doesn't already use pinctrl) to hang the pinctrl
++ // reference on - leds will do
++
++ fragment@0 {
++ target = <&leds>;
++ __overlay__ {
++ pinctrl-names = "default";
++ pinctrl-0 = <&dpi24_pins>;
++ };
++ };
++
++ fragment@1 {
++ target = <&gpio>;
++ __overlay__ {
++ dpi24_pins: dpi24_pins {
++ brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
++ 12 13 14 15 16 17 18 19 20
++ 21 22 23 24 25 26 27>;
++ brcm,function = <6>; /* alt2 */
++ brcm,pull = <0>; /* no pull */
++ };
++ };
++ };
++};
n252'>252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625
/* -*-  Mode:C; c-basic-offset:4; tab-width:4; indent-tabs-mode:nil -*- */
/*
 * vmmu.c: virtual memory management unit components.
 * Copyright (c) 2005, Intel Corporation.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
 * version 2, as published by the Free Software Foundation.
 *
 * This program is distributed in the hope it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
 * Place - Suite 330, Boston, MA 02111-1307 USA.
 *
 *  Xuefei Xu (Anthony Xu) (Anthony.xu@intel.com)
 *  Yaozu Dong (Eddie Dong) (Eddie.dong@intel.com)
 */
#include <asm/vmx_vcpu.h>
#include <asm/vmx_pal_vsa.h>
#include <xen/sched-if.h>
#include <asm/vhpt.h>

static int default_vtlb_sz = DEFAULT_VTLB_SZ;
static int default_vhpt_sz = DEFAULT_VHPT_SZ;

static void __init parse_vtlb_size(char *s)
{
    int sz = parse_size_and_unit(s, NULL);

    if (sz > 0) {
        default_vtlb_sz = fls(sz - 1);
        /* minimum 16KB (for tag uniqueness) */
        if (default_vtlb_sz < 14)
            default_vtlb_sz = 14;
    }
}

static void __init parse_vhpt_size(char *s)
{
    int sz = parse_size_and_unit(s, NULL);
    if (sz > 0) {
        default_vhpt_sz = fls(sz - 1);
        default_vhpt_sz = canonicalize_vhpt_size(default_vhpt_sz);
    }
}

custom_param("vti_vtlb_size", parse_vtlb_size);
custom_param("vti_vhpt_size", parse_vhpt_size);


static int init_domain_vhpt(struct vcpu *v)
{
    int rc;
    u64 size = v->domain->arch.hvm_domain.params[HVM_PARAM_VHPT_SIZE];

    if (size == 0)
        size = default_vhpt_sz;
    else
        size = canonicalize_vhpt_size(size);

    rc = thash_alloc(&(v->arch.vhpt), size, "vhpt");
    v->arch.arch_vmx.mpta = v->arch.vhpt.pta.val;
    return rc;
}


static void free_domain_vhpt(struct vcpu *v)
{
    if (v->arch.vhpt.hash)
        thash_free(&(v->arch.vhpt));
}

int init_domain_tlb(struct vcpu *v)
{
    int rc;

    rc = init_domain_vhpt(v);
    if (rc)
        return rc;

    rc = thash_alloc(&(v->arch.vtlb), default_vtlb_sz, "vtlb");
    if (rc) {
        free_domain_vhpt(v);
        return rc;
    }
    
    return 0;
}


void free_domain_tlb(struct vcpu *v)
{
    if (v->arch.vtlb.hash)
        thash_free(&(v->arch.vtlb));

    free_domain_vhpt(v);
}


int vhpt_enabled(VCPU *vcpu, uint64_t vadr, vhpt_ref_t ref)
{
    ia64_rr  vrr;
    PTA   vpta;
    IA64_PSR  vpsr; 

    vpsr.val = VCPU(vcpu, vpsr);
    vcpu_get_rr(vcpu, vadr, &vrr.rrval);
    vpta.val = vmx_vcpu_get_pta(vcpu);

    if ( vrr.ve & vpta.ve ) {
        switch ( ref ) {
        case DATA_REF:
        case NA_REF:
            return vpsr.dt;
        case INST_REF:
            return vpsr.dt && vpsr.it && vpsr.ic;
        case RSE_REF:
            return vpsr.dt && vpsr.rt;

        }
    }
    return 0;
}


int unimplemented_gva(VCPU *vcpu,u64 vadr)
{
#if 0
    int bit=vcpu->domain->arch.imp_va_msb;
    u64 ladr =(vadr<<3)>>(3+bit);
    if(!ladr||ladr==(1U<<(61-bit))-1){
        return 0;
    }else{
        return 1;
    }
#else
    return 0;
#endif
}


/*
 * Fetch guest bundle code.
 * INPUT:
 *  gip: guest ip
 *  pbundle: used to return fetched bundle.
 */
unsigned long
fetch_code(VCPU *vcpu, u64 gip, IA64_BUNDLE *pbundle)
{
    u64     gpip=0;   // guest physical IP
    u64     *vpa;
    thash_data_t    *tlb;
    u64     mfn, maddr;
    struct page_info* page;

 again:
    if ( !(VCPU(vcpu, vpsr) & IA64_PSR_IT) ) {   // I-side physical mode
        gpip = pa_clear_uc(gip);	// clear UC bit
    }
    else {
        tlb = vtlb_lookup(vcpu, gip, ISIDE_TLB);
//        if( tlb == NULL )
//             tlb = vtlb_lookup(vcpu, gip, DSIDE_TLB );
        if (tlb)
            gpip = thash_translate(tlb, gip);
    }
    if( gpip){
        mfn = gmfn_to_mfn(vcpu->domain, gpip >>PAGE_SHIFT);
        if (mfn == INVALID_MFN)
            panic_domain(vcpu_regs(vcpu), "fetch_code: invalid memory\n");
        maddr = (mfn << PAGE_SHIFT) | (gpip & (PAGE_SIZE - 1));
    }else{
        tlb = vhpt_lookup(gip);