diff options
Diffstat (limited to 'target/linux/brcm2708/patches-3.14/0013-Fixes-for-sdhci-bcm2708.patch')
| -rw-r--r-- | target/linux/brcm2708/patches-3.14/0013-Fixes-for-sdhci-bcm2708.patch | 1276 |
1 files changed, 1276 insertions, 0 deletions
diff --git a/target/linux/brcm2708/patches-3.14/0013-Fixes-for-sdhci-bcm2708.patch b/target/linux/brcm2708/patches-3.14/0013-Fixes-for-sdhci-bcm2708.patch new file mode 100644 index 0000000000..d59df5b28b --- /dev/null +++ b/target/linux/brcm2708/patches-3.14/0013-Fixes-for-sdhci-bcm2708.patch @@ -0,0 +1,1276 @@ +From 58a6eba44c8b8a13ff99a7696519437c0abeb3aa Mon Sep 17 00:00:00 2001 +From: popcornmix <popcornmix@gmail.com> +Date: Tue, 8 May 2012 23:12:13 +0100 +Subject: [PATCH 13/54] Fixes for sdhci-bcm2708 + +possible fix for sdcard missing status. Thank naren + +sdcard patch improvements from naren + +sdhci-bcm2708: speed up DMA sync + +Experiments show that it doesn't really take that long to sync, so we +can reduce the poll interval slightly. Might improve performance a bit. + +sdhci-bcm2708: remove custom clock handling + +The custom clock handling code is redundant and buggy. The MMC/SDHCI +subsystem does a better job than it, so remove it for good. + +sdhci-bcm2708: add additional quirks + +Some additional quirks are needed for correct operation. +There's no SDHCI capabilities register documented, and it always reads +zero, so add SDHCI_QUIRK_MISSING_CAPS. Apparently +SDHCI_QUIRK_NO_HISPD_BIT is needed for many cards to work correctly in +high-speed mode, so add it as well. + +sdhci-bcm2708: add allow_highspeed parameter + +Add a parameter to disable high-speed mode for the few cards that +still might have problems. High-speed mode is enabled by default. + +sdhci-bcm2708: assume 50 MHz eMMC clock + +80 MHz clock isnt't suited well to be dividable to get SD clocks of 25 +MHz (default mode) or 50 MHz (high speed mode). 50 MHz are perfect to +drive the SD interface at ideal frequencies. + +Allow emmc clock to be specified as command line parameter + +sdhci-bcm2708: raise DMA sync timeout + +Commit d64b84c by accident reduced the maximum overall DMA sync +timeout. The maximum overall timeout was reduced from 100ms to 30ms, +which isn't enough for many cards. Increase it to 150ms, just to be +extra safe. According to commit 872a8ff in the MMC subsystem, some +cards require crazy long timeouts (3s), but as we're busy-waiting, +and shouldn't delay for such a long time, let's hope 150ms will be +enough for most cards. + +Use ndelay rather than udelay. Thanks lb + +Add sync_after_dma module parameter + +sdhci-bcm2708: use extension FIFO to buffer DMA transfers + +The additional FIFO might speed up transfers in some cases. + +sdhci-bcm2708: use multiblock-type transfers for single blocks + +There are issues with both single block reads (missed completion) +and writes (data loss in some cases!). Just don't do single block +transfers anymore, and treat them like multiblock transfers. This +adds a quirk for this and uses it. + +Add module parameter for missing_status quirk. sdhci-bcm2708.missing_status=0 may improve interrupt latency + +Fix spinlock recursion in sdhci-bcm2708.c + +mmc: Report 3.3V support in caps + +sdhci: Use macros for out spin lock/unlock functions to reduce diffs with upstream code + +sdhci: sdhci_bcm2708_quirk_voltage_broken appears to be a no-op + +sdhci: sdhci_bcm2708_uhs_broken should be handled through caps reported + +Add low-latency mode to sdcard driver. Disable with sdhci-bcm2708.enable_llm=0. Thanks ddv2005. + +Allow the number of cycles delay between sdcard peripheral writes to be specified on command line with sdhci-bcm2708.cycle_delay + +Lazy CRC quirk: Implemented retrying mechanisms for SD SSR and SCR, disabled missing_status and spurious CRC ACMD51 quirks by default (should be fixed by the retrying-mechanishm) + +mmc: suppress sdcard warnings we are happy about by default + +sdhci-bcm2807: Increase sync_after_dma timeout + +The current timeout is being hit with some cards that complete successfully with a longer timeout. +The timeout is not handled well, and is believed to be a code path that causes corruption. +872a8ff suggests that crappy cards can take up to 3 seconds to respond + +remove suspend/resume + +fix sign in sdhci_bcm2708_raw_writel wait calculation + +The ns_wait variable is intended to hold a lower bound on the number of nanoseconds that have elapsed since the last sdhci register write. However, the actual calculation of it was incorrect, as the subtraction was inverted. This commit fixes the calculation. + +Note that this correction has no bearing when running with the default cycle_delay of 2 and the default clock rate of 50 MHz, under which conditions ns_2clk is 40 nanoseconds and ns_wait, regardless of whether the subtraction is done correctly or incorrectly, cannot possibly be less than 40 except for during the one-microsecond period just before the tick counter wraps around to meet last_write_hpt (i.e., approximately 4295 seconds after the preceding sdhci register write). The correction in this commit only comes into play if ns_2clk > 1000, which requires a cycle_delay of 51 or greater when using the default clock rate. Under those conditions, sdhci_bcm2708_raw_writel will not wait for the full cycle_delay count if at least 1000 nanoseconds have elapsed since the last register write. + +sdhci: Only do one iteration of PIO reading loop + +Changed wording on logging. Previously, we received errors like this: +mmc0: could read SD Status register (SSR) at the 3th attempt +A more sensible response is now returned. +A typo also fixed in comments. +--- + drivers/mmc/card/block.c | 2 +- + drivers/mmc/core/sd.c | 110 +++++++++++++++-- + drivers/mmc/host/sdhci-bcm2708.c | 254 ++++++++++++++++++--------------------- + drivers/mmc/host/sdhci.c | 180 ++++++++++++++++++++------- + drivers/mmc/host/sdhci.h | 8 +- + include/linux/mmc/host.h | 1 + + include/linux/mmc/sdhci.h | 1 + + 7 files changed, 365 insertions(+), 191 deletions(-) + +diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c +index 7b5424f..687cccb 100644 +--- a/drivers/mmc/card/block.c ++++ b/drivers/mmc/card/block.c +@@ -1361,7 +1361,7 @@ static void mmc_blk_rw_rq_prep(struct mmc_queue_req *mqrq, + brq->data.blocks = 1; + } + +- if (brq->data.blocks > 1 || do_rel_wr) { ++ if (brq->data.blocks > 1 || do_rel_wr || card->host->caps2 & MMC_CAP2_FORCE_MULTIBLOCK) { + /* SPI multiblock writes terminate using a special + * token, not a STOP_TRANSMISSION request. + */ +diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c +index 692fdb1..ea11f9c 100644 +--- a/drivers/mmc/core/sd.c ++++ b/drivers/mmc/core/sd.c +@@ -15,6 +15,8 @@ + #include <linux/slab.h> + #include <linux/stat.h> + #include <linux/pm_runtime.h> ++#include <linux/jiffies.h> ++#include <linux/nmi.h> + + #include <linux/mmc/host.h> + #include <linux/mmc/card.h> +@@ -67,6 +69,15 @@ static const unsigned int sd_au_size[] = { + __res & __mask; \ + }) + ++// timeout for tries ++static const unsigned long retry_timeout_ms= 10*1000; ++ ++// try at least 10 times, even if timeout is reached ++static const int retry_min_tries= 10; ++ ++// delay between tries ++static const unsigned long retry_delay_ms= 10; ++ + /* + * Given the decoded CSD structure, decode the raw CID to our CID structure. + */ +@@ -219,12 +230,63 @@ static int mmc_decode_scr(struct mmc_card *card) + } + + /* +- * Fetch and process SD Status register. ++ * Fetch and process SD Configuration Register. ++ */ ++static int mmc_read_scr(struct mmc_card *card) ++{ ++ unsigned long timeout_at; ++ int err, tries; ++ ++ timeout_at= jiffies + msecs_to_jiffies( retry_timeout_ms ); ++ tries= 0; ++ ++ while( tries < retry_min_tries || time_before( jiffies, timeout_at ) ) ++ { ++ unsigned long delay_at; ++ tries++; ++ ++ err = mmc_app_send_scr(card, card->raw_scr); ++ if( !err ) ++ break; // success!!! ++ ++ touch_nmi_watchdog(); // we are still alive! ++ ++ // delay ++ delay_at= jiffies + msecs_to_jiffies( retry_delay_ms ); ++ while( time_before( jiffies, delay_at ) ) ++ { ++ mdelay( 1 ); ++ touch_nmi_watchdog(); // we are still alive! ++ } ++ } ++ ++ if( err) ++ { ++ pr_err("%s: failed to read SD Configuration register (SCR) after %d tries during %lu ms, error %d\n", mmc_hostname(card->host), tries, retry_timeout_ms, err ); ++ return err; ++ } ++ ++ if( tries > 1 ) ++ { ++ pr_info("%s: could read SD Configuration register (SCR) at the %dth attempt\n", mmc_hostname(card->host), tries ); ++ } ++ ++ err = mmc_decode_scr(card); ++ if (err) ++ return err; ++ ++ return err; ++} ++ ++/* ++ * Fetch and process SD Status Register. + */ + static int mmc_read_ssr(struct mmc_card *card) + { ++ unsigned long timeout_at; + unsigned int au, es, et, eo; + int err, i; ++ int tries; + u32 *ssr; + + if (!(card->csd.cmdclass & CCC_APP_SPEC)) { +@@ -237,14 +299,40 @@ static int mmc_read_ssr(struct mmc_card *card) + if (!ssr) + return -ENOMEM; + +- err = mmc_app_sd_status(card, ssr); +- if (err) { +- pr_warning("%s: problem reading SD Status " +- "register.\n", mmc_hostname(card->host)); +- err = 0; ++ timeout_at= jiffies + msecs_to_jiffies( retry_timeout_ms ); ++ tries= 0; ++ ++ while( tries < retry_min_tries || time_before( jiffies, timeout_at ) ) ++ { ++ unsigned long delay_at; ++ tries++; ++ ++ err= mmc_app_sd_status(card, ssr); ++ if( !err ) ++ break; // sucess!!! ++ ++ touch_nmi_watchdog(); // we are still alive! ++ ++ // delay ++ delay_at= jiffies + msecs_to_jiffies( retry_delay_ms ); ++ while( time_before( jiffies, delay_at ) ) ++ { ++ mdelay( 1 ); ++ touch_nmi_watchdog(); // we are still alive! ++ } ++ } ++ ++ if( err) ++ { ++ pr_err("%s: failed to read SD Status register (SSR) after %d tries during %lu ms, error %d\n", mmc_hostname(card->host), tries, retry_timeout_ms, err ); + goto out; + } + ++ if( tries > 1 ) ++ { ++ pr_info("%s: read SD Status register (SSR) after %d attempts\n", mmc_hostname(card->host), tries ); ++ } ++ + for (i = 0; i < 16; i++) + ssr[i] = be32_to_cpu(ssr[i]); + +@@ -826,14 +914,10 @@ int mmc_sd_setup_card(struct mmc_host *host, struct mmc_card *card, + + if (!reinit) { + /* +- * Fetch SCR from card. ++ * Fetch and decode SD Configuration register. + */ +- err = mmc_app_send_scr(card, card->raw_scr); +- if (err) +- return err; +- +- err = mmc_decode_scr(card); +- if (err) ++ err = mmc_read_scr(card); ++ if( err ) + return err; + + /* +diff --git a/drivers/mmc/host/sdhci-bcm2708.c b/drivers/mmc/host/sdhci-bcm2708.c +index d8ef77c..3173c18 100644 +--- a/drivers/mmc/host/sdhci-bcm2708.c ++++ b/drivers/mmc/host/sdhci-bcm2708.c +@@ -51,7 +51,6 @@ + #undef CONFIG_MMC_SDHCI_BCM2708_DMA + #define CONFIG_MMC_SDHCI_BCM2708_DMA y + +-#define USE_SYNC_AFTER_DMA + #ifdef CONFIG_MMC_SDHCI_BCM2708_DMA + /* #define CHECK_DMA_USE */ + #endif +@@ -73,7 +72,12 @@ + #define BCM2708_SDHCI_SLEEP_TIMEOUT 1000 /* msecs */ + + /* Mhz clock that the EMMC core is running at. Should match the platform clockman settings */ +-#define BCM2708_EMMC_CLOCK_FREQ 80000000 ++#define BCM2708_EMMC_CLOCK_FREQ 50000000 ++ ++#define REG_EXRDFIFO_EN 0x80 ++#define REG_EXRDFIFO_CFG 0x84 ++ ++int cycle_delay=2; + + /*****************************************************************************\ + * * +@@ -129,6 +133,14 @@ static inline unsigned long int since_ns(hptime_t t) + return (unsigned long)((hptime() - t) * HPTIME_CLK_NS); + } + ++static bool allow_highspeed = 1; ++static int emmc_clock_freq = BCM2708_EMMC_CLOCK_FREQ; ++static bool sync_after_dma = 1; ++static bool missing_status = 1; ++static bool spurious_crc_acmd51 = 0; ++bool enable_llm = 1; ++bool extra_messages = 0; ++ + #if 0 + static void hptime_test(void) + { +@@ -241,19 +253,19 @@ static void sdhci_bcm2708_raw_writel(struct sdhci_host *host, u32 val, int reg) + /* host->clock is the clock freq in Hz */ + static hptime_t last_write_hpt; + hptime_t now = hptime(); +- ns_2clk = 2000000000/host->clock; ++ ns_2clk = cycle_delay*1000000/(host->clock/1000); + + if (now == last_write_hpt || now == last_write_hpt+1) { + /* we can't guarantee any significant time has + * passed - we'll have to wait anyway ! */ +- udelay((ns_2clk+1000-1)/1000); ++ ndelay(ns_2clk); + } else + { + /* we must have waited at least this many ns: */ + unsigned int ns_wait = HPTIME_CLK_NS * +- (last_write_hpt - now - 1); ++ (now - last_write_hpt - 1); + if (ns_wait < ns_2clk) +- udelay((ns_2clk-ns_wait+500)/1000); ++ ndelay(ns_2clk - ns_wait); + } + last_write_hpt = now; + } +@@ -269,13 +281,13 @@ static void sdhci_bcm2708_raw_writel(struct sdhci_host *host, u32 val, int reg) + ier &= ~SDHCI_INT_DATA_TIMEOUT; + writel(ier, host->ioaddr + SDHCI_SIGNAL_ENABLE); + timeout_disabled = true; +- udelay((ns_2clk+1000-1)/1000); ++ ndelay(ns_2clk); + } else if (timeout_disabled) { + ier = readl(host->ioaddr + SDHCI_SIGNAL_ENABLE); + ier |= SDHCI_INT_DATA_TIMEOUT; + writel(ier, host->ioaddr + SDHCI_SIGNAL_ENABLE); + timeout_disabled = false; +- udelay((ns_2clk+1000-1)/1000); ++ ndelay(ns_2clk); + } + #endif + writel(val, host->ioaddr + reg); +@@ -353,68 +365,9 @@ void sdhci_bcm2708_writeb(struct sdhci_host *host, u8 val, int reg) + + static unsigned int sdhci_bcm2708_get_max_clock(struct sdhci_host *host) + { +- return 20000000; // this value is in Hz (20MHz) +-} +- +-static unsigned int sdhci_bcm2708_get_timeout_clock(struct sdhci_host *host) +-{ +- if(host->clock) +- return (host->clock / 1000); // this value is in kHz (100MHz) +- else +- return (sdhci_bcm2708_get_max_clock(host) / 1000); ++ return emmc_clock_freq; + } + +-static void sdhci_bcm2708_set_clock(struct sdhci_host *host, unsigned int clock) +-{ +- int div = 0; +- u16 clk = 0; +- unsigned long timeout; +- +- if (clock == host->clock) +- return; +- +- sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); +- +- if (clock == 0) +- goto out; +- +- if (BCM2708_EMMC_CLOCK_FREQ <= clock) +- div = 1; +- else { +- for (div = 2; div < SDHCI_MAX_DIV_SPEC_300; div += 2) { +- if ((BCM2708_EMMC_CLOCK_FREQ / div) <= clock) +- break; +- } +- } +- +- DBG( "desired SD clock: %d, actual: %d\n", +- clock, BCM2708_EMMC_CLOCK_FREQ / div); +- +- clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT; +- clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN) +- << SDHCI_DIVIDER_HI_SHIFT; +- clk |= SDHCI_CLOCK_INT_EN; +- +- sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); +- +- timeout = 20; +- while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL)) +- & SDHCI_CLOCK_INT_STABLE)) { +- if (timeout == 0) { +- printk(KERN_ERR "%s: Internal clock never " +- "stabilised.\n", mmc_hostname(host->mmc)); +- return; +- } +- timeout--; +- mdelay(1); +- } +- +- clk |= SDHCI_CLOCK_CARD_EN; +- sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); +-out: +- host->clock = clock; +- } +- + /*****************************************************************************\ + * * + * DMA Operation * +@@ -695,11 +648,11 @@ void + sdhci_bcm2708_platdma_reset(struct sdhci_host *host, struct mmc_data *data) + { + struct sdhci_bcm2708_priv *host_priv = SDHCI_HOST_PRIV(host); +- unsigned long flags; ++// unsigned long flags; + + BUG_ON(NULL == host); + +- spin_lock_irqsave(&host->lock, flags); ++// spin_lock_irqsave(&host->lock, flags); + + if (host_priv->dma_wanted) { + if (NULL == data) { +@@ -720,13 +673,16 @@ sdhci_bcm2708_platdma_reset(struct sdhci_host *host, struct mmc_data *data) + cs = readl(host_priv->dma_chan_base + BCM2708_DMA_CS); + + if (!(BCM2708_DMA_ACTIVE & cs)) +- printk(KERN_INFO "%s: missed completion of " ++ { ++ if (extra_messages) ++ printk(KERN_INFO "%s: missed completion of " + "cmd %d DMA (%d/%d [%d]/[%d]) - " + "ignoring it\n", + mmc_hostname(host->mmc), + host->last_cmdop, + host_priv->sg_done, sg_todo, + host_priv->sg_ix+1, sg_len); ++ } + else + printk(KERN_INFO "%s: resetting ongoing cmd %d" + "DMA before %d/%d [%d]/[%d] complete\n", +@@ -779,7 +735,7 @@ sdhci_bcm2708_platdma_reset(struct sdhci_host *host, struct mmc_data *data) + #endif + } + +- spin_unlock_irqrestore(&host->lock, flags); ++// spin_unlock_irqrestore(&host->lock, flags); + } + + +@@ -792,11 +748,11 @@ static void sdhci_bcm2708_dma_complete_irq(struct sdhci_host *host, + int sg_len; + int sg_ix; + int sg_todo; +- unsigned long flags; ++// unsigned long flags; + + BUG_ON(NULL == host); + +- spin_lock_irqsave(&host->lock, flags); ++// spin_lock_irqsave(&host->lock, flags); + data = host->data; + + #ifdef CHECK_DMA_USE +@@ -821,7 +777,7 @@ static void sdhci_bcm2708_dma_complete_irq(struct sdhci_host *host, + + if (NULL == data) { + DBG("PDMA unused completion - status 0x%X\n", dma_cs); +- spin_unlock_irqrestore(&host->lock, flags); ++// spin_unlock_irqrestore(&host->lock, flags); + return; + } + sg = data->sg; +@@ -878,40 +834,34 @@ static void sdhci_bcm2708_dma_complete_irq(struct sdhci_host *host, + SDHCI_INT_SPACE_AVAIL); + } + } else { +-#ifdef USE_SYNC_AFTER_DMA +- /* On the Arasan controller the stop command (which will be +- scheduled after this completes) does not seem to work +- properly if we allow it to be issued when we are +- transferring data to/from the SD card. +- We get CRC and DEND errors unless we wait for +- the SD controller to finish reading/writing to the card. */ +- u32 state_mask; +- int timeout=1000000; +- hptime_t now = hptime(); +- +- DBG("PDMA over - sync card\n"); +- if (data->flags & MMC_DATA_READ) +- state_mask = SDHCI_DOING_READ; +- else +- state_mask = SDHCI_DOING_WRITE; +- +- while (0 != (sdhci_bcm2708_raw_readl(host, +- SDHCI_PRESENT_STATE) & +- state_mask) && --timeout > 0) +- continue; ++ if (sync_after_dma) { ++ /* On the Arasan controller the stop command (which will be ++ scheduled after this completes) does not seem to work ++ properly if we allow it to be issued when we are ++ transferring data to/from the SD card. ++ We get CRC and DEND errors unless we wait for ++ the SD controller to finish reading/writing to the card. */ ++ u32 state_mask; ++ int timeout=3*1000*1000; ++ ++ DBG("PDMA over - sync card\n"); ++ if (data->flags & MMC_DATA_READ) ++ state_mask = SDHCI_DOING_READ; ++ else ++ state_mask = SDHCI_DOING_WRITE; + +- if (1000000-timeout > 4000) /*ave. is about 3250*/ +- DBG("%s: note - long %s sync %luns - " +- "%d its.\n", +- mmc_hostname(host->mmc), +- data->flags & MMC_DATA_READ? "read": "write", +- since_ns(now), 1000000-timeout); +- if (timeout <= 0) +- printk(KERN_ERR"%s: final %s to SD card still " +- "running\n", +- mmc_hostname(host->mmc), +- data->flags & MMC_DATA_READ? "read": "write"); +-#endif ++ while (0 != (sdhci_bcm2708_raw_readl(host, SDHCI_PRESENT_STATE) ++ & state_mask) && --timeout > 0) ++ { ++ udelay(1); ++ continue; ++ } ++ if (timeout <= 0) ++ printk(KERN_ERR"%s: final %s to SD card still " ++ "running\n", ++ mmc_hostname(host->mmc), ++ data->flags & MMC_DATA_READ? "read": "write"); ++ } + if (host_priv->complete) { + (*host_priv->complete)(host); + DBG("PDMA %s complete\n", +@@ -920,7 +870,7 @@ static void sdhci_bcm2708_dma_complete_irq(struct sdhci_host *host, + SDHCI_INT_SPACE_AVAIL); + } + } +- spin_unlock_irqrestore(&host->lock, flags); ++// spin_unlock_irqrestore(&host->lock, flags); + } + + static irqreturn_t sdhci_bcm2708_dma_irq(int irq, void *dev_id) +@@ -929,12 +879,11 @@ static irqreturn_t sdhci_bcm2708_dma_irq(int irq, void *dev_id) + struct sdhci_host *host = dev_id; + struct sdhci_bcm2708_priv *host_priv = SDHCI_HOST_PRIV(host); + u32 dma_cs; /* control and status register */ +- unsigned long flags; + + BUG_ON(NULL == dev_id); + BUG_ON(NULL == host_priv->dma_chan_base); + +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock(host); + + dma_cs = readl(host_priv->dma_chan_base + BCM2708_DMA_CS); + +@@ -958,7 +907,8 @@ static irqreturn_t sdhci_bcm2708_dma_irq(int irq, void *dev_id) + + if (!host_priv->dma_wanted) { + /* ignore this interrupt - it was reset */ +- printk(KERN_INFO "%s: DMA IRQ %X ignored - " ++ if (extra_messages) ++ printk(KERN_INFO "%s: DMA IRQ %X ignored - " + "results were reset\n", + mmc_hostname(host->mmc), dma_cs); + #ifdef CHECK_DMA_USE +@@ -975,8 +925,7 @@ static irqreturn_t sdhci_bcm2708_dma_irq(int irq, void *dev_id) + + result = IRQ_HANDLED; + } +- +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock(host); + + return result; + } +@@ -1019,10 +968,12 @@ static ssize_t attr_dma_store(struct device *_dev, + int on = simple_strtol(buf, NULL, 0); + if (on) { + host->flags |= SDHCI_USE_PLATDMA; ++ sdhci_bcm2708_writel(host, 1, REG_EXRDFIFO_EN); + printk(KERN_INFO "%s: DMA enabled\n", + mmc_hostname(host->mmc)); + } else { + host->flags &= ~(SDHCI_USE_PLATDMA | SDHCI_REQ_USE_DMA); ++ sdhci_bcm2708_writel(host, 0, REG_EXRDFIFO_EN); + printk(KERN_INFO "%s: DMA disabled\n", + mmc_hostname(host->mmc)); + } +@@ -1126,7 +1077,7 @@ static int sdhci_bcm2708_suspend(struct platform_device *dev, pm_message_t state + int ret = 0; + + if (host->mmc) { +- ret = mmc_suspend_host(host->mmc); ++ //ret = mmc_suspend_host(host->mmc); + } + + return ret; +@@ -1139,7 +1090,7 @@ static int sdhci_bcm2708_resume(struct platform_device *dev) + int ret = 0; + + if (host->mmc) { +- ret = mmc_resume_host(host->mmc); ++ //ret = mmc_resume_host(host->mmc); + } + + return ret; +@@ -1158,19 +1109,14 @@ static unsigned int sdhci_bcm2708_quirk_extra_ints(struct sdhci_host *host) + return 1; + } + +-static unsigned int sdhci_bcm2708_quirk_spurious_crc(struct sdhci_host *host) ++static unsigned int sdhci_bcm2708_quirk_spurious_crc_acmd51(struct sdhci_host *host) + { + return 1; + } + +-static unsigned int sdhci_bcm2708_quirk_voltage_broken(struct sdhci_host *host) ++static unsigned int sdhci_bcm2708_missing_status(struct sdhci_host *host) + { +- return 1; +-} +- +-static unsigned int sdhci_bcm2708_uhs_broken(struct sdhci_host *host) +-{ +- return 1; ++ return 1; + } + + /***************************************************************************** \ +@@ -1190,11 +1136,7 @@ static struct sdhci_ops sdhci_bcm2708_ops = { + #else + #error The BCM2708 SDHCI driver needs CONFIG_MMC_SDHCI_IO_ACCESSORS to be set + #endif +- //.enable_dma = NULL, +- .set_clock = sdhci_bcm2708_set_clock, + .get_max_clock = sdhci_bcm2708_get_max_clock, +- //.get_min_clock = NULL, +- .get_timeout_clock = sdhci_bcm2708_get_timeout_clock, + + #ifdef CONFIG_MMC_SDHCI_BCM2708_DMA + // Platform DMA operations +@@ -1203,9 +1145,6 @@ static struct sdhci_ops sdhci_bcm2708_ops = { + .pdma_reset = sdhci_bcm2708_platdma_reset, + #endif + .extra_ints = sdhci_bcm2708_quirk_extra_ints, +- .spurious_crc_acmd51 = sdhci_bcm2708_quirk_spurious_crc, +- .voltage_broken = sdhci_bcm2708_quirk_voltage_broken, +- .uhs_broken = sdhci_bcm2708_uhs_broken, + }; + + /*****************************************************************************\ +@@ -1244,15 +1183,30 @@ static int sdhci_bcm2708_probe(struct platform_device *pdev) + ret = PTR_ERR(host); + goto err; + } ++ if (missing_status) { ++ sdhci_bcm2708_ops.missing_status = sdhci_bcm2708_missing_status; ++ } ++ ++ if( spurious_crc_acmd51 ) { ++ sdhci_bcm2708_ops.spurious_crc_acmd51 = sdhci_bcm2708_quirk_spurious_crc_acmd51; ++ } ++ ++ ++ printk("sdhci: %s low-latency mode\n",enable_llm?"Enable":"Disable"); + + host->hw_name = "BCM2708_Arasan"; + host->ops = &sdhci_bcm2708_ops; + host->irq = platform_get_irq(pdev, 0); ++ host->second_irq = 0; + + host->quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION | + SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | + SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | +- SDHCI_QUIRK_NONSTANDARD_CLOCK; ++ SDHCI_QUIRK_MISSING_CAPS | ++ SDHCI_QUIRK_NO_HISPD_BIT | ++ (sync_after_dma ? 0:SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12); ++ ++ + #ifdef CONFIG_MMC_SDHCI_BCM2708_DMA + host->flags = SDHCI_USE_PLATDMA; + #endif +@@ -1305,17 +1259,24 @@ static int sdhci_bcm2708_probe(struct platform_device *pdev) + host_priv->dma_chan = ret; + + ret = request_irq(host_priv->dma_irq, sdhci_bcm2708_dma_irq, +- IRQF_SHARED, DRIVER_NAME " (dma)", host); ++ 0 /*IRQF_SHARED*/, DRIVER_NAME " (dma)", host); + if (ret) { + dev_err(&pdev->dev, "cannot set DMA IRQ\n"); + goto err_add_dma_irq; + } ++ host->second_irq = host_priv->dma_irq; + DBG("DMA CBs %p handle %08X DMA%d %p DMA IRQ %d\n", + host_priv->cb_base, (unsigned)host_priv->cb_handle, + host_priv->dma_chan, host_priv->dma_chan_base, + host_priv->dma_irq); + +- host->mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; ++ // we support 3.3V ++ host->caps |= SDHCI_CAN_VDD_330; ++ if (allow_highspeed) ++ host->mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; ++ ++ /* single block writes cause data loss with some SD cards! */ ++ host->mmc->caps2 |= MMC_CAP2_FORCE_MULTIBLOCK; + #endif + + ret = sdhci_add_host(host); +@@ -1327,6 +1288,12 @@ static int sdhci_bcm2708_probe(struct platform_device *pdev) + ret = device_create_file(&pdev->dev, &dev_attr_dma_wait); + ret = device_create_file(&pdev->dev, &dev_attr_status); + ++#ifdef CONFIG_MMC_SDHCI_BCM2708_DMA ++ /* enable extension fifo for paced DMA transfers */ ++ sdhci_bcm2708_writel(host, 1, REG_EXRDFIFO_EN); ++ sdhci_bcm2708_writel(host, 4, REG_EXRDFIFO_CFG); ++#endif ++ + printk(KERN_INFO "%s: BCM2708 SDHC host at 0x%08llx DMA %d IRQ %d\n", + mmc_hostname(host->mmc), (unsigned long long)iomem->start, + host_priv->dma_chan, host_priv->dma_irq); +@@ -1418,7 +1385,26 @@ static void __exit sdhci_drv_exit(void) + module_init(sdhci_drv_init); + module_exit(sdhci_drv_exit); + ++module_param(allow_highspeed, bool, 0444); ++module_param(emmc_clock_freq, int, 0444); ++module_param(sync_after_dma, bool, 0444); ++module_param(missing_status, bool, 0444); ++module_param(spurious_crc_acmd51, bool, 0444); ++module_param(enable_llm, bool, 0444); ++module_param(cycle_delay, int, 0444); ++module_param(extra_messages, bool, 0444); ++ + MODULE_DESCRIPTION("Secure Digital Host Controller Interface platform driver"); + MODULE_AUTHOR("Broadcom <info@broadcom.com>"); + MODULE_LICENSE("GPL v2"); + MODULE_ALIAS("platform:"DRIVER_NAME); ++ ++MODULE_PARM_DESC(allow_highspeed, "Allow high speed transfers modes"); ++MODULE_PARM_DESC(emmc_clock_freq, "Specify the speed of emmc clock"); ++MODULE_PARM_DESC(sync_after_dma, "Block in driver until dma complete"); ++MODULE_PARM_DESC(missing_status, "Use the missing status quirk"); ++MODULE_PARM_DESC(spurious_crc_acmd51, "Use the spurious crc quirk for reading SCR (ACMD51)"); ++MODULE_PARM_DESC(enable_llm, "Enable low-latency mode"); ++MODULE_PARM_DESC(extra_messages, "Enable more sdcard warning messages"); ++ ++ +diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c +index b78afa2..db67be8 100644 +--- a/drivers/mmc/host/sdhci.c ++++ b/drivers/mmc/host/sdhci.c +@@ -131,6 +131,99 @@ static void sdhci_dumpregs(struct sdhci_host *host) + * Low level functions * + * * + \*****************************************************************************/ ++extern bool enable_llm; ++static int sdhci_locked=0; ++void sdhci_spin_lock(struct sdhci_host *host) ++{ ++ spin_lock(&host->lock); ++#ifdef CONFIG_PREEMPT ++ if(enable_llm) ++ { ++ disable_irq_nosync(host->irq); ++ if(host->second_irq) ++ disable_irq_nosync(host->second_irq); ++ local_irq_enable(); ++ } ++#endif ++} ++ ++void sdhci_spin_unlock(struct sdhci_host *host) ++{ ++#ifdef CONFIG_PREEMPT ++ if(enable_llm) ++ { ++ local_irq_disable(); ++ if(host->second_irq) ++ enable_irq(host->second_irq); ++ enable_irq(host->irq); ++ } ++#endif ++ spin_unlock(&host->lock); ++} ++ ++void sdhci_spin_lock_irqsave(struct sdhci_host *host,unsigned long *flags) ++{ ++#ifdef CONFIG_PREEMPT ++ if(enable_llm) ++ { ++ while(sdhci_locked) ++ { ++ preempt_schedule(); ++ } ++ spin_lock_irqsave(&host->lock,*flags); ++ disable_irq(host->irq); ++ if(host->second_irq) ++ disable_irq(host->second_irq); ++ local_irq_enable(); ++ } ++ else ++#endif ++ spin_lock_irqsave(&host->lock,*flags); ++} ++ ++void sdhci_spin_unlock_irqrestore(struct sdhci_host *host,unsigned long flags) ++{ ++#ifdef CONFIG_PREEMPT ++ if(enable_llm) ++ { ++ local_irq_disable(); ++ if(host->second_irq) ++ enable_irq(host->second_irq); ++ enable_irq(host->irq); ++ } ++#endif ++ spin_unlock_irqrestore(&host->lock,flags); ++} ++ ++static void sdhci_spin_enable_schedule(struct sdhci_host *host) ++{ ++#ifdef CONFIG_PREEMPT ++ if(enable_llm) ++ { ++ sdhci_locked = 1; ++ preempt_enable(); ++ } ++#endif ++} ++ ++static void sdhci_spin_disable_schedule(struct sdhci_host *host) ++{ ++#ifdef CONFIG_PREEMPT ++ if(enable_llm) ++ { ++ preempt_disable(); ++ sdhci_locked = 0; ++ } ++#endif ++} ++ ++ ++#undef spin_lock_irqsave ++#define spin_lock_irqsave(host_lock, flags) sdhci_spin_lock_irqsave(container_of(host_lock, struct sdhci_host, lock), &flags) ++#define spin_unlock_irqrestore(host_lock, flags) sdhci_spin_unlock_irqrestore(container_of(host_lock, struct sdhci_host, lock), flags) ++ ++#define spin_lock(host_lock) sdhci_spin_lock(container_of(host_lock, struct sdhci_host, lock)) ++#define spin_unlock(host_lock) sdhci_spin_unlock(container_of(host_lock, struct sdhci_host, lock)) + + static void sdhci_clear_set_irqs(struct sdhci_host *host, u32 clear, u32 set) + { +@@ -300,7 +393,7 @@ static void sdhci_led_control(struct led_classdev *led, + struct sdhci_host *host = container_of(led, struct sdhci_host, led); + unsigned long flags; + +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + + if (host->runtime_suspended) + goto out; +@@ -310,7 +403,7 @@ static void sdhci_led_control(struct led_classdev *led, + else + sdhci_activate_led(host); + out: +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + } + #endif + +@@ -457,6 +550,7 @@ static void sdhci_transfer_pio(struct sdhci_host *host, u32 intstate) + break; + state = sdhci_readl(host, SDHCI_PRESENT_STATE); + available = state & mask; ++ break; + } + + DBG("PIO transfer complete - %d blocks left.\n", host->blocks); +@@ -1023,7 +1117,9 @@ void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd) + return; + } + timeout--; ++ sdhci_spin_enable_schedule(host); + mdelay(1); ++ sdhci_spin_disable_schedule(host); + } + DBG("send cmd %d - wait 0x%X irq 0x%x\n", cmd->opcode, mask, + sdhci_readl(host, SDHCI_INT_STATUS)); +@@ -1256,7 +1352,9 @@ clock_set: + return; + } + timeout--; ++ sdhci_spin_enable_schedule(host); + mdelay(1); ++ sdhci_spin_disable_schedule(host); + } + + clk |= SDHCI_CLOCK_CARD_EN; +@@ -1357,7 +1455,7 @@ static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq) + + sdhci_runtime_pm_get(host); + +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + + WARN_ON(host->mrq != NULL); + +@@ -1422,9 +1520,9 @@ static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq) + */ + host->mrq = NULL; + +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + sdhci_execute_tuning(mmc, tuning_opcode); +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + + /* Restore original mmc_request structure */ + host->mrq = mrq; +@@ -1438,7 +1536,7 @@ static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq) + } + + mmiowb(); +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + } + + static void sdhci_do_set_ios(struct sdhci_host *host, struct mmc_ios *ios) +@@ -1447,10 +1545,10 @@ static void sdhci_do_set_ios(struct sdhci_host *host, struct mmc_ios *ios) + int vdd_bit = -1; + u8 ctrl; + +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + + if (host->flags & SDHCI_DEVICE_DEAD) { +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + if (host->vmmc && ios->power_mode == MMC_POWER_OFF) + mmc_regulator_set_ocr(host->mmc, host->vmmc, 0); + return; +@@ -1478,9 +1576,9 @@ static void sdhci_do_set_ios(struct sdhci_host *host, struct mmc_ios *ios) + vdd_bit = sdhci_set_power(host, ios->vdd); + + if (host->vmmc && vdd_bit != -1) { +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + mmc_regulator_set_ocr(host->mmc, host->vmmc, vdd_bit); +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + } + + if (host->ops->platform_send_init_74_clocks) +@@ -1519,7 +1617,7 @@ static void sdhci_do_set_ios(struct sdhci_host *host, struct mmc_ios *ios) + else + ctrl &= ~SDHCI_CTRL_HISPD; + +- if (host->version >= SDHCI_SPEC_300 && !(host->ops->uhs_broken)) { ++ if (host->version >= SDHCI_SPEC_300) { + u16 clk, ctrl_2; + + /* In case of UHS-I modes, set High Speed Enable */ +@@ -1617,7 +1715,7 @@ static void sdhci_do_set_ios(struct sdhci_host *host, struct mmc_ios *ios) + sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA); + + mmiowb(); +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + } + + static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) +@@ -1665,7 +1763,7 @@ static int sdhci_check_ro(struct sdhci_host *host) + unsigned long flags; + int is_readonly; + +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + + if (host->flags & SDHCI_DEVICE_DEAD) + is_readonly = 0; +@@ -1675,7 +1773,7 @@ static int sdhci_check_ro(struct sdhci_host *host) + is_readonly = !(sdhci_readl(host, SDHCI_PRESENT_STATE) + & SDHCI_WRITE_PROTECT); + +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + + /* This quirk needs to be replaced by a callback-function later */ + return host->quirks & SDHCI_QUIRK_INVERTED_WRITE_PROTECT ? +@@ -1748,9 +1846,9 @@ static void sdhci_enable_sdio_irq(struct mmc_host *mmc, int enable) + struct sdhci_host *host = mmc_priv(mmc); + unsigned long flags; + +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + sdhci_enable_sdio_irq_nolock(host, enable); +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + } + + static int sdhci_do_start_signal_voltage_switch(struct sdhci_host *host, +@@ -2101,7 +2199,7 @@ static void sdhci_card_event(struct mmc_host *mmc) + if (host->ops->card_event) + host->ops->card_event(host); + +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + + /* Check host->mrq first in case we are runtime suspended */ + if (host->mrq && !sdhci_do_get_cd(host)) { +@@ -2117,7 +2215,7 @@ static void sdhci_card_event(struct mmc_host *mmc) + tasklet_schedule(&host->finish_tasklet); + } + +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + } + + static const struct mmc_host_ops sdhci_ops = { +@@ -2156,14 +2254,14 @@ static void sdhci_tasklet_finish(unsigned long param) + + host = (struct sdhci_host*)param; + +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + + /* + * If this tasklet gets rescheduled while running, it will + * be run again afterwards but without any active request. + */ + if (!host->mrq) { +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + return; + } + +@@ -2201,7 +2299,7 @@ static void sdhci_tasklet_finish(unsigned long param) + #endif + + mmiowb(); +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + + mmc_request_done(host->mmc, mrq); + sdhci_runtime_pm_put(host); +@@ -2214,7 +2312,7 @@ static void sdhci_timeout_timer(unsigned long data) + + host = (struct sdhci_host*)data; + +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + + if (host->mrq) { + pr_err("%s: Timeout waiting for hardware " +@@ -2235,7 +2333,7 @@ static void sdhci_timeout_timer(unsigned long data) + } + + mmiowb(); +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + } + + static void sdhci_tuning_timer(unsigned long data) +@@ -2245,11 +2343,11 @@ static void sdhci_tuning_timer(unsigned long data) + + host = (struct sdhci_host *)data; + +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + + host->flags |= SDHCI_NEEDS_RETUNING; + +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + } + + /*****************************************************************************\ +@@ -2473,10 +2571,10 @@ static irqreturn_t sdhci_irq(int irq, void *dev_id) + u32 intmask, unexpected = 0; + int cardint = 0, max_loops = 16; + +- spin_lock(&host->lock); ++ sdhci_spin_lock(host); + + if (host->runtime_suspended) { +- spin_unlock(&host->lock); ++ sdhci_spin_unlock(host); + pr_warning("%s: got irq while runtime suspended\n", + mmc_hostname(host->mmc)); + return IRQ_HANDLED; +@@ -2588,7 +2686,7 @@ again: + if (intmask && --max_loops) + goto again; + out: +- spin_unlock(&host->lock); ++ sdhci_spin_unlock(host); + + if (unexpected) { + pr_err("%s: Unexpected interrupt 0x%08x.\n", +@@ -2674,7 +2772,7 @@ int sdhci_resume_host(struct sdhci_host *host) + } + + if (!device_may_wakeup(mmc_dev(host->mmc))) { +- ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED, ++ ret = request_irq(host->irq, sdhci_irq, 0 /*IRQF_SHARED*/, + mmc_hostname(host->mmc), host); + if (ret) + return ret; +@@ -2750,15 +2848,15 @@ int sdhci_runtime_suspend_host(struct sdhci_host *host) + host->flags &= ~SDHCI_NEEDS_RETUNING; + } + +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + sdhci_mask_irqs(host, SDHCI_INT_ALL_MASK); +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + + synchronize_irq(host->irq); + +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + host->runtime_suspended = true; +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + + return ret; + } +@@ -2784,16 +2882,16 @@ int sdhci_runtime_resume_host(struct sdhci_host *host) + sdhci_do_start_signal_voltage_switch(host, &host->mmc->ios); + if ((host_flags & SDHCI_PV_ENABLED) && + !(host->quirks2 & SDHCI_QUIRK2_PRESET_VALUE_BROKEN)) { +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + sdhci_enable_preset_value(host, true); +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + } + + /* Set the re-tuning expiration flag */ + if (host->flags & SDHCI_USING_RETUNING_TIMER) + host->flags |= SDHCI_NEEDS_RETUNING; + +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + + host->runtime_suspended = false; + +@@ -2804,7 +2902,7 @@ int sdhci_runtime_resume_host(struct sdhci_host *host) + /* Enable Card Detection */ + sdhci_enable_card_detection(host); + +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + + return ret; + } +@@ -3300,8 +3398,8 @@ int sdhci_add_host(struct sdhci_host *host) + + sdhci_init(host, 0); + +- ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED, +- mmc_hostname(mmc), host); ++ ret = request_irq(host->irq, sdhci_irq, 0 /*IRQF_SHARED*/, ++ mmc_hostname(mmc), host); + if (ret) { + pr_err("%s: Failed to request IRQ %d: %d\n", + mmc_hostname(mmc), host->irq, ret); +@@ -3362,7 +3460,7 @@ void sdhci_remove_host(struct sdhci_host *host, int dead) + unsigned long flags; + + if (dead) { +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + + host->flags |= SDHCI_DEVICE_DEAD; + +@@ -3374,7 +3472,7 @@ void sdhci_remove_host(struct sdhci_host *host, int dead) + tasklet_schedule(&host->finish_tasklet); + } + +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + } + + sdhci_disable_card_detection(host); +diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h +index 6857875..649f3cf 100644 +--- a/drivers/mmc/host/sdhci.h ++++ b/drivers/mmc/host/sdhci.h +@@ -300,8 +300,6 @@ struct sdhci_ops { + struct mmc_data *data); + unsigned int (*extra_ints)(struct sdhci_host *host); + unsigned int (*spurious_crc_acmd51)(struct sdhci_host *host); +- unsigned int (*voltage_broken)(struct sdhci_host *host); +- unsigned int (*uhs_broken)(struct sdhci_host *host); + unsigned int (*missing_status)(struct sdhci_host *host); + + void (*hw_reset)(struct sdhci_host *host); +@@ -445,4 +443,10 @@ extern int sdhci_runtime_suspend_host(struct sdhci_host *host); + extern int sdhci_runtime_resume_host(struct sdhci_host *host); + #endif + ++extern void sdhci_spin_lock_irqsave(struct sdhci_host *host,unsigned long *flags); ++extern void sdhci_spin_unlock_irqrestore(struct sdhci_host *host,unsigned long flags); ++extern void sdhci_spin_lock(struct sdhci_host *host); ++extern void sdhci_spin_unlock(struct sdhci_host *host); ++ ++ + #endif /* __SDHCI_HW_H */ +diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h +index 99f5709..cd6f996 100644 +--- a/include/linux/mmc/host.h ++++ b/include/linux/mmc/host.h +@@ -282,6 +282,7 @@ struct mmc_host { + MMC_CAP2_PACKED_WR) + #define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14) /* Don't power up before scan */ + #define MMC_CAP2_SANITIZE (1 << 15) /* Support Sanitize */ ++#define MMC_CAP2_FORCE_MULTIBLOCK (1 << 31) /* Always use multiblock transfers */ + + mmc_pm_flag_t pm_caps; /* supported pm features */ + +diff --git a/include/linux/mmc/sdhci.h b/include/linux/mmc/sdhci.h +index e23fffb..b1b6537 100644 +--- a/include/linux/mmc/sdhci.h ++++ b/include/linux/mmc/sdhci.h +@@ -102,6 +102,7 @@ struct sdhci_host { + #define SDHCI_QUIRK2_BROKEN_HS200 (1<<6) + + int irq; /* Device IRQ */ ++ int second_irq; /* Additional IRQ to disable/enable in low-latency mode */ + void __iomem *ioaddr; /* Mapped address */ + + const struct sdhci_ops *ops; /* Low level hw interface */ +-- +1.9.1 + |