diff options
Diffstat (limited to 'package/kernel/mac80211/patches/616-rt2x00-support-rt5350.patch')
| -rw-r--r-- | package/kernel/mac80211/patches/616-rt2x00-support-rt5350.patch | 285 |
1 files changed, 285 insertions, 0 deletions
diff --git a/package/kernel/mac80211/patches/616-rt2x00-support-rt5350.patch b/package/kernel/mac80211/patches/616-rt2x00-support-rt5350.patch new file mode 100644 index 0000000000..79e864ba89 --- /dev/null +++ b/package/kernel/mac80211/patches/616-rt2x00-support-rt5350.patch @@ -0,0 +1,285 @@ +--- a/drivers/net/wireless/rt2x00/rt2800.h ++++ b/drivers/net/wireless/rt2x00/rt2800.h +@@ -71,6 +71,7 @@ + #define RF3053 0x000d + #define RF5592 0x000f + #define RF3290 0x3290 ++#define RF5350 0x5350 + #define RF5360 0x5360 + #define RF5370 0x5370 + #define RF5372 0x5372 +--- a/drivers/net/wireless/rt2x00/rt2800lib.c ++++ b/drivers/net/wireless/rt2x00/rt2800lib.c +@@ -2141,6 +2141,15 @@ static void rt2800_config_channel_rf53xx + if (rf->channel <= 14) { + int idx = rf->channel-1; + ++ if (rt2x00_rt(rt2x00dev, RT5350)) { ++ static const char r59_non_bt[] = {0x0b, 0x0b, ++ 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0a, ++ 0x0a, 0x09, 0x08, 0x07, 0x07, 0x06}; ++ ++ rt2800_rfcsr_write(rt2x00dev, 59, ++ r59_non_bt[idx]); ++ } ++ + if (test_bit(CAPABILITY_BT_COEXIST, &rt2x00dev->cap_flags)) { + if (rt2x00_rt_rev_gte(rt2x00dev, RT5390, REV_RT5390F)) { + /* r55/r59 value array of channel 1~14 */ +@@ -2598,6 +2607,7 @@ static void rt2800_config_channel(struct + case RF3322: + rt2800_config_channel_rf3322(rt2x00dev, conf, rf, info); + break; ++ case RF5350: + case RF5360: + case RF5370: + case RF5372: +@@ -2614,6 +2624,7 @@ static void rt2800_config_channel(struct + + if (rt2x00_rf(rt2x00dev, RF3290) || + rt2x00_rf(rt2x00dev, RF3322) || ++ rt2x00_rf(rt2x00dev, RF5350) || + rt2x00_rf(rt2x00dev, RF5360) || + rt2x00_rf(rt2x00dev, RF5370) || + rt2x00_rf(rt2x00dev, RF5372) || +@@ -2755,7 +2766,8 @@ static void rt2800_config_channel(struct + /* + * Clear update flag + */ +- if (rt2x00_rt(rt2x00dev, RT3352)) { ++ if (rt2x00_rt(rt2x00dev, RT3352) || ++ rt2x00_rt(rt2x00dev, RT5350)) { + rt2800_bbp_read(rt2x00dev, 49, &bbp); + rt2x00_set_field8(&bbp, BBP49_UPDATE_FLAG, 0); + rt2800_bbp_write(rt2x00dev, 49, bbp); +@@ -3201,6 +3213,7 @@ void rt2800_vco_calibration(struct rt2x0 + rt2800_rfcsr_write(rt2x00dev, 7, rfcsr); + break; + case RF3290: ++ case RF5350: + case RF5360: + case RF5370: + case RF5372: +@@ -3540,7 +3553,8 @@ static int rt2800_init_registers(struct + } else if (rt2x00_rt(rt2x00dev, RT3572)) { + rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400); + rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606); +- } else if (rt2x00_rt(rt2x00dev, RT5390) || ++ } else if (rt2x00_rt(rt2x00dev, RT5350) || ++ rt2x00_rt(rt2x00dev, RT5390) || + rt2x00_rt(rt2x00dev, RT5392) || + rt2x00_rt(rt2x00dev, RT5592)) { + rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404); +@@ -4193,9 +4207,13 @@ static void rt2800_init_bbp_3352(struct + + rt2800_bbp_write(rt2x00dev, 82, 0x62); + +- rt2800_bbp_write(rt2x00dev, 83, 0x6a); +- +- rt2800_bbp_write(rt2x00dev, 84, 0x99); ++ if (rt2x00_rt(rt2x00dev, RT5350)) { ++ rt2800_bbp_write(rt2x00dev, 83, 0x7a); ++ rt2800_bbp_write(rt2x00dev, 84, 0x9a); ++ } else { ++ rt2800_bbp_write(rt2x00dev, 83, 0x6a); ++ rt2800_bbp_write(rt2x00dev, 84, 0x99); ++ } + + rt2800_bbp_write(rt2x00dev, 86, 0x38); + +@@ -4209,9 +4227,13 @@ static void rt2800_init_bbp_3352(struct + + rt2800_bbp_write(rt2x00dev, 104, 0x92); + +- rt2800_bbp_write(rt2x00dev, 105, 0x34); +- +- rt2800_bbp_write(rt2x00dev, 106, 0x05); ++ if (rt2x00_rt(rt2x00dev, RT5350)) { ++ rt2800_bbp_write(rt2x00dev, 105, 0x3c); ++ rt2800_bbp_write(rt2x00dev, 106, 0x03); ++ } else { ++ rt2800_bbp_write(rt2x00dev, 105, 0x34); ++ rt2800_bbp_write(rt2x00dev, 106, 0x05); ++ } + + rt2800_bbp_write(rt2x00dev, 120, 0x50); + +@@ -4236,6 +4258,13 @@ static void rt2800_init_bbp_3352(struct + rt2800_bbp_write(rt2x00dev, 143, 0xa2); + + rt2800_bbp_write(rt2x00dev, 148, 0xc8); ++ ++ if (rt2x00_rt(rt2x00dev, RT5350)) { ++ rt2800_bbp_write(rt2x00dev, 150, 0x40); /* Antenna Software OFDM */ ++ rt2800_bbp_write(rt2x00dev, 151, 0x30); /* Antenna Software CCK */ ++ rt2800_bbp_write(rt2x00dev, 152, 0xa3); ++ rt2800_bbp_write(rt2x00dev, 154, 0); /* Clear previously selected antenna */ ++ } + } + + static void rt2800_init_bbp_3390(struct rt2x00_dev *rt2x00dev) +@@ -4520,6 +4549,7 @@ static void rt2800_init_bbp(struct rt2x0 + rt2800_init_bbp_3290(rt2x00dev); + break; + case RT3352: ++ case RT5350: + rt2800_init_bbp_3352(rt2x00dev); + break; + case RT3390: +@@ -5159,6 +5189,76 @@ static void rt2800_init_rfcsr_3572(struc + rt2800_normal_mode_setup_3xxx(rt2x00dev); + } + ++static void rt2800_init_rfcsr_5350(struct rt2x00_dev *rt2x00dev) ++{ ++ rt2800_rfcsr_write(rt2x00dev, 0, 0xf0); ++ rt2800_rfcsr_write(rt2x00dev, 1, 0x23); ++ rt2800_rfcsr_write(rt2x00dev, 2, 0x50); ++ rt2800_rfcsr_write(rt2x00dev, 3, 0x08); ++ rt2800_rfcsr_write(rt2x00dev, 4, 0x49); ++ rt2800_rfcsr_write(rt2x00dev, 5, 0x10); ++ rt2800_rfcsr_write(rt2x00dev, 6, 0xe0); ++ rt2800_rfcsr_write(rt2x00dev, 7, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 8, 0xf1); ++ rt2800_rfcsr_write(rt2x00dev, 9, 0x02); ++ rt2800_rfcsr_write(rt2x00dev, 10, 0x53); ++ rt2800_rfcsr_write(rt2x00dev, 11, 0x4a); ++ rt2800_rfcsr_write(rt2x00dev, 12, 0x46); ++ if(rt2x00dev->spec.clk_is_20mhz) ++ rt2800_rfcsr_write(rt2x00dev, 13, 0x1f); ++ else ++ rt2800_rfcsr_write(rt2x00dev, 13, 0x9f); ++ rt2800_rfcsr_write(rt2x00dev, 14, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 15, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 16, 0xc0); ++ rt2800_rfcsr_write(rt2x00dev, 18, 0x03); ++ rt2800_rfcsr_write(rt2x00dev, 19, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 20, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 21, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 22, 0x20); ++ rt2800_rfcsr_write(rt2x00dev, 23, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 24, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 25, 0x80); ++ rt2800_rfcsr_write(rt2x00dev, 26, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 27, 0x03); ++ rt2800_rfcsr_write(rt2x00dev, 28, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 29, 0xd0); ++ rt2800_rfcsr_write(rt2x00dev, 30, 0x10); ++ rt2800_rfcsr_write(rt2x00dev, 31, 0x80); ++ rt2800_rfcsr_write(rt2x00dev, 32, 0x80); ++ rt2800_rfcsr_write(rt2x00dev, 33, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 34, 0x07); ++ rt2800_rfcsr_write(rt2x00dev, 35, 0x12); ++ rt2800_rfcsr_write(rt2x00dev, 36, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 37, 0x08); ++ rt2800_rfcsr_write(rt2x00dev, 38, 0x85); ++ rt2800_rfcsr_write(rt2x00dev, 39, 0x1b); ++ rt2800_rfcsr_write(rt2x00dev, 40, 0x0b); ++ rt2800_rfcsr_write(rt2x00dev, 41, 0xbb); ++ rt2800_rfcsr_write(rt2x00dev, 42, 0xd5); ++ rt2800_rfcsr_write(rt2x00dev, 43, 0x9b); ++ rt2800_rfcsr_write(rt2x00dev, 44, 0x0c); ++ rt2800_rfcsr_write(rt2x00dev, 45, 0xa6); ++ rt2800_rfcsr_write(rt2x00dev, 46, 0x73); ++ rt2800_rfcsr_write(rt2x00dev, 47, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 48, 0x10); ++ rt2800_rfcsr_write(rt2x00dev, 49, 0x80); ++ rt2800_rfcsr_write(rt2x00dev, 50, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 51, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 52, 0x38); ++ rt2800_rfcsr_write(rt2x00dev, 53, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 54, 0x38); ++ rt2800_rfcsr_write(rt2x00dev, 55, 0x43); ++ rt2800_rfcsr_write(rt2x00dev, 56, 0x82); ++ rt2800_rfcsr_write(rt2x00dev, 57, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 58, 0x39); ++ rt2800_rfcsr_write(rt2x00dev, 59, 0x0b); ++ rt2800_rfcsr_write(rt2x00dev, 60, 0x45); ++ rt2800_rfcsr_write(rt2x00dev, 61, 0xd1); ++ rt2800_rfcsr_write(rt2x00dev, 62, 0x00); ++ rt2800_rfcsr_write(rt2x00dev, 63, 0x00); ++} ++ + static void rt2800_init_rfcsr_5390(struct rt2x00_dev *rt2x00dev) + { + rt2800_rf_init_calibration(rt2x00dev, 2); +@@ -5387,6 +5487,9 @@ static void rt2800_init_rfcsr(struct rt2 + case RT3572: + rt2800_init_rfcsr_3572(rt2x00dev); + break; ++ case RT5350: ++ rt2800_init_rfcsr_5350(rt2x00dev); ++ break; + case RT5390: + rt2800_init_rfcsr_5390(rt2x00dev); + break; +@@ -5598,6 +5701,12 @@ static int rt2800_validate_eeprom(struct + rt2x00_set_field16(&word, EEPROM_NIC_CONF0_RF_TYPE, RF2820); + rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC_CONF0, word); + rt2x00_eeprom_dbg(rt2x00dev, "Antenna: 0x%04x\n", word); ++ } else if (rt2x00_rt(rt2x00dev, RT5350)) { ++ rt2x00_set_field16(&word, EEPROM_NIC_CONF0_RXPATH, 1); ++ rt2x00_set_field16(&word, EEPROM_NIC_CONF0_TXPATH, 1); ++ rt2x00_set_field16(&word, EEPROM_NIC_CONF0_RF_TYPE, RF3320); ++ rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC_CONF0, word); ++ rt2x00_eeprom_dbg(rt2x00dev, "Antenna: 0x%04x\n", word); + } else if (rt2x00_rt(rt2x00dev, RT2860) || + rt2x00_rt(rt2x00dev, RT2872)) { + /* +@@ -5723,9 +5832,12 @@ static int rt2800_init_eeprom(struct rt2 + */ + if (rt2x00_rt(rt2x00dev, RT3290) || + rt2x00_rt(rt2x00dev, RT3352) || ++ rt2x00_rt(rt2x00dev, RT5350) || + rt2x00_rt(rt2x00dev, RT5390) || + rt2x00_rt(rt2x00dev, RT5392)) + rt2x00_eeprom_read(rt2x00dev, EEPROM_CHIP_ID, &rf); ++ else if (rt2x00_rt(rt2x00dev, RT5350)) ++ rf = RF5350; + else + rf = rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RF_TYPE); + +@@ -5742,6 +5854,7 @@ static int rt2800_init_eeprom(struct rt2 + case RF3290: + case RF3320: + case RF3322: ++ case RF5350: + case RF5360: + case RF5370: + case RF5372: +@@ -6240,7 +6353,8 @@ static int rt2800_probe_hw_mode(struct r + rt2x00_rf(rt2x00dev, RF5392)) { + spec->num_channels = 14; + spec->channels = rf_vals_3x; +- } else if (rt2x00_rf(rt2x00dev, RF3322)) { ++ } else if (rt2x00_rf(rt2x00dev, RF3322) || ++ rt2x00_rf(rt2x00dev, RF5350)) { + spec->num_channels = 14; + if (spec->clk_is_20mhz) + spec->channels = rf_vals_xtal20mhz_3x; +@@ -6341,6 +6455,7 @@ static int rt2800_probe_hw_mode(struct r + case RF3320: + case RF3052: + case RF3290: ++ case RF5350: + case RF5360: + case RF5370: + case RF5372: +@@ -6378,6 +6493,7 @@ static int rt2800_probe_rt(struct rt2x00 + case RT3352: + case RT3390: + case RT3572: ++ case RT5350: + case RT5390: + case RT5392: + case RT5592: +--- a/drivers/net/wireless/rt2x00/rt2x00.h ++++ b/drivers/net/wireless/rt2x00/rt2x00.h +@@ -181,6 +181,7 @@ struct rt2x00_chip { + #define RT3572 0x3572 + #define RT3593 0x3593 + #define RT3883 0x3883 /* WSOC */ ++#define RT5350 0x5350 /* WSOC 2.4GHz */ + #define RT5390 0x5390 /* 2.4GHz */ + #define RT5392 0x5392 /* 2.4GHz */ + #define RT5592 0x5592 |