diff options
Diffstat (limited to 'package/boot/uboot-lantiq/patches/0032-MIPS-add-board-support-for-ZTE-ZXV10-H201L.patch')
| -rw-r--r-- | package/boot/uboot-lantiq/patches/0032-MIPS-add-board-support-for-ZTE-ZXV10-H201L.patch | 251 |
1 files changed, 0 insertions, 251 deletions
diff --git a/package/boot/uboot-lantiq/patches/0032-MIPS-add-board-support-for-ZTE-ZXV10-H201L.patch b/package/boot/uboot-lantiq/patches/0032-MIPS-add-board-support-for-ZTE-ZXV10-H201L.patch deleted file mode 100644 index eb77f96e4e..0000000000 --- a/package/boot/uboot-lantiq/patches/0032-MIPS-add-board-support-for-ZTE-ZXV10-H201L.patch +++ /dev/null @@ -1,251 +0,0 @@ -From 2473526cf879ead429c6aa1fb7fb77ed3407baaa Mon Sep 17 00:00:00 2001 -From: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> -Date: Sun, 9 Dec 2012 17:35:09 +0100 -Subject: MIPS: add board support for ZTE ZXV10 H201L - -Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> - ---- /dev/null -+++ b/board/zte/zxv10h201l/Makefile -@@ -0,0 +1,27 @@ -+# -+# Copyright (C) 2000-2011 Wolfgang Denk, DENX Software Engineering, wd@denx.de -+# -+# SPDX-License-Identifier: GPL-2.0+ -+# -+ -+include $(TOPDIR)/config.mk -+ -+LIB = $(obj)lib$(BOARD).o -+ -+COBJS = $(BOARD).o -+ -+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -+OBJS := $(addprefix $(obj),$(COBJS)) -+SOBJS := $(addprefix $(obj),$(SOBJS)) -+ -+$(LIB): $(obj).depend $(OBJS) $(SOBJS) -+ $(call cmd_link_o_target, $(OBJS) $(SOBJS)) -+ -+######################################################################### -+ -+# defines $(obj).depend target -+include $(SRCTREE)/rules.mk -+ -+sinclude $(obj).depend -+ -+######################################################################### ---- /dev/null -+++ b/board/zte/zxv10h201l/config.mk -@@ -0,0 +1,7 @@ -+# -+# Copyright (C) 2012-2013 Daniel Schwierzeck, daniel.schwierzeck@gmail.com -+# -+# SPDX-License-Identifier: GPL-2.0+ -+# -+ -+PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(BOARDDIR) ---- /dev/null -+++ b/board/zte/zxv10h201l/ddr_settings.h -@@ -0,0 +1,55 @@ -+/* -+ * Copyright (C) 2012 Daniel Schwierzeck, daniel.schwierzeck@gmail.com -+ * -+ * The values have been extracted from original ZTE U-Boot. -+ * -+ * SPDX-License-Identifier: GPL-2.0+ -+ */ -+ -+#define MC_DC00_VALUE 0x1B1B -+#define MC_DC01_VALUE 0x0 -+#define MC_DC02_VALUE 0x0 -+#define MC_DC03_VALUE 0x0 -+#define MC_DC04_VALUE 0x0 -+#define MC_DC05_VALUE 0x200 -+#define MC_DC06_VALUE 0x307 -+#define MC_DC07_VALUE 0x303 -+#define MC_DC08_VALUE 0x103 -+#define MC_DC09_VALUE 0x80B -+#define MC_DC10_VALUE 0x203 -+#define MC_DC11_VALUE 0xE02 -+#define MC_DC12_VALUE 0x2C8 -+#define MC_DC13_VALUE 0x1 -+#define MC_DC14_VALUE 0x0 -+#define MC_DC15_VALUE 0x100 -+#define MC_DC16_VALUE 0xC800 -+#define MC_DC17_VALUE 0xF -+#define MC_DC18_VALUE 0x301 -+#define MC_DC19_VALUE 0x200 -+#define MC_DC20_VALUE 0xA04 -+#define MC_DC21_VALUE 0x1600 -+#define MC_DC22_VALUE 0x1616 -+#define MC_DC23_VALUE 0x0 -+#define MC_DC24_VALUE 0x5D -+#define MC_DC25_VALUE 0x0 -+#define MC_DC26_VALUE 0x0 -+#define MC_DC27_VALUE 0x0 -+#define MC_DC28_VALUE 0x5FB -+#define MC_DC29_VALUE 0x35DF -+#define MC_DC30_VALUE 0x99E9 -+#define MC_DC31_VALUE 0x0 -+#define MC_DC32_VALUE 0x0 -+#define MC_DC33_VALUE 0x0 -+#define MC_DC34_VALUE 0x0 -+#define MC_DC35_VALUE 0x0 -+#define MC_DC36_VALUE 0x0 -+#define MC_DC37_VALUE 0x0 -+#define MC_DC38_VALUE 0x0 -+#define MC_DC39_VALUE 0x0 -+#define MC_DC40_VALUE 0x0 -+#define MC_DC41_VALUE 0x0 -+#define MC_DC42_VALUE 0x0 -+#define MC_DC43_VALUE 0x0 -+#define MC_DC44_VALUE 0x0 -+#define MC_DC45_VALUE 0x600 -+#define MC_DC46_VALUE 0x0 ---- /dev/null -+++ b/board/zte/zxv10h201l/zxv10h201l.c -@@ -0,0 +1,51 @@ -+/* -+ * Copyright (C) 2012 Daniel Schwierzeck, daniel.schwierzeck@gmail.com -+ * -+ * SPDX-License-Identifier: GPL-2.0+ -+ */ -+ -+#include <common.h> -+#include <switch.h> -+#include <asm/gpio.h> -+#include <asm/lantiq/eth.h> -+#include <asm/lantiq/reset.h> -+#include <asm/lantiq/chipid.h> -+ -+int board_early_init_f(void) -+{ -+ return 0; -+} -+ -+int checkboard(void) -+{ -+ puts("Board: " CONFIG_BOARD_NAME "\n"); -+ ltq_chip_print_info(); -+ -+ return 0; -+} -+ -+static const struct ltq_eth_port_config eth_port_config[] = { -+ /* MAC0: REALTEK RTL8306 switch */ -+ { 0, 0x0, LTQ_ETH_PORT_SWITCH, PHY_INTERFACE_MODE_RMII }, -+}; -+ -+static const struct ltq_eth_board_config eth_board_config = { -+ .ports = eth_port_config, -+ .num_ports = ARRAY_SIZE(eth_port_config), -+}; -+ -+int board_eth_init(bd_t *bis) -+{ -+ return ltq_eth_initialize(ð_board_config); -+} -+ -+static struct switch_device rtl8306_dev = { -+ .name = "rtl8306", -+ .cpu_port = 5, -+ .port_mask = 0xF, -+}; -+ -+int board_switch_init(void) -+{ -+ return switch_device_register(&rtl8306_dev); -+} ---- a/boards.cfg -+++ b/boards.cfg -@@ -496,6 +496,9 @@ Active mips mips32 - - Active mips mips32 - micronas vct vct_premium_onenand vct:VCT_PREMIUM,VCT_ONENAND - - Active mips mips32 - micronas vct vct_premium_onenand_small vct:VCT_PREMIUM,VCT_ONENAND,VCT_SMALL_IMAGE - - Active mips mips32 - micronas vct vct_premium_small vct:VCT_PREMIUM,VCT_SMALL_IMAGE - -+Active mips mips32 arx100 zte zxv10h201l zxv10h201l_nor zxv10h201l:SYS_BOOT_NOR Luka Perkov <luka@openwrt.org> -+Active mips mips32 arx100 zte zxv10h201l zxv10h201l_ram zxv10h201l:SYS_BOOT_RAM Luka Perkov <luka@openwrt.org> -+Active mips mips32 arx100 zte zxv10h201l zxv10h201l_zte zxv10h201l:SYS_BOOT_ZTE Luka Perkov <luka@openwrt.org> - Active mips mips32 au1x00 - dbau1x00 dbau1000 dbau1x00:DBAU1000 Thomas Lange <thomas@corelatus.se> - Active mips mips32 au1x00 - dbau1x00 dbau1100 dbau1x00:DBAU1100 Thomas Lange <thomas@corelatus.se> - Active mips mips32 au1x00 - dbau1x00 dbau1500 dbau1x00:DBAU1500 Thomas Lange <thomas@corelatus.se> ---- /dev/null -+++ b/include/configs/zxv10h201l.h -@@ -0,0 +1,77 @@ -+/* -+ * Copyright (C) 2011 Daniel Schwierzeck, daniel.schwierzeck@googlemail.com -+ * -+ * SPDX-License-Identifier: GPL-2.0+ -+ */ -+ -+#ifndef __CONFIG_H -+#define __CONFIG_H -+ -+#define CONFIG_MACH_TYPE "ZXV10 H201L" -+#define CONFIG_IDENT_STRING " "CONFIG_MACH_TYPE -+#define CONFIG_BOARD_NAME "ZTE ZXV10 H201L" -+ -+/* Configure SoC */ -+#define CONFIG_LTQ_SUPPORT_UART /* Enable ASC and UART */ -+ -+#define CONFIG_LTQ_SUPPORT_ETHERNET /* Enable ethernet */ -+ -+#define CONFIG_LTQ_SUPPORT_NOR_FLASH /* Have a parallel NOR flash */ -+ -+#define CONFIG_LTQ_SUPPORT_SPL_NOR_FLASH /* Build NOR flash SPL */ -+#define CONFIG_LTQ_SPL_COMP_LZO /* Compress SPL with LZO */ -+#define CONFIG_LTQ_SPL_CONSOLE /* Enable SPL console */ -+ -+/* Switch devices */ -+#define CONFIG_SWITCH_MULTI -+#define CONFIG_SWITCH_RTL8306 -+ -+/* Environment */ -+#if defined(CONFIG_SYS_BOOT_NOR) -+#define CONFIG_ENV_IS_IN_FLASH -+#define CONFIG_ENV_OVERWRITE -+#define CONFIG_ENV_OFFSET (256 * 1024) -+#define CONFIG_ENV_SECT_SIZE (64 * 1024) -+#elif defined(CONFIG_SYS_BOOT_NORSPL) -+#define CONFIG_ENV_IS_IN_FLASH -+#define CONFIG_ENV_OVERWRITE -+#define CONFIG_ENV_OFFSET (128 * 1024) -+#define CONFIG_ENV_SECT_SIZE (64 * 1024) -+#else -+#define CONFIG_ENV_IS_NOWHERE -+#endif -+ -+#define CONFIG_ENV_SIZE (8 * 1024) -+#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR -+ -+#if defined(CONFIG_SYS_BOOT_ZTE) -+#define CONFIG_SYS_TEXT_BASE 0x80800000 -+#define CONFIG_SKIP_LOWLEVEL_INIT -+#endif -+ -+/* Console */ -+#define CONFIG_LTQ_ADVANCED_CONSOLE -+#define CONFIG_BAUDRATE 115200 -+#define CONFIG_CONSOLE_ASC 1 -+#define CONFIG_CONSOLE_DEV "ttyLTQ1" -+ -+/* Pull in default board configs for Lantiq XWAY Danube */ -+#include <asm/lantiq/config.h> -+#include <asm/arch/config.h> -+ -+#if defined(CONFIG_SYS_BOOT_ZTE) -+#define CONFIG_SYS_TEXT_BASE 0x80800000 -+#define CONFIG_SKIP_LOWLEVEL_INIT -+#endif -+ -+/* Pull in default OpenWrt configs for Lantiq SoC */ -+#include "openwrt-lantiq-common.h" -+ -+#define CONFIG_ENV_UPDATE_UBOOT_NOR \ -+ "update-uboot-nor=run load-uboot-norspl-lzo write-uboot-nor\0" -+ -+#define CONFIG_EXTRA_ENV_SETTINGS \ -+ CONFIG_ENV_LANTIQ_DEFAULTS \ -+ CONFIG_ENV_UPDATE_UBOOT_NOR -+ -+#endif /* __CONFIG_H */ |