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| author | Hauke Mehrtens <hauke@hauke-m.de> | 2013-12-01 16:37:58 +0000 |
|---|---|---|
| committer | Hauke Mehrtens <hauke@hauke-m.de> | 2013-12-01 16:37:58 +0000 |
| commit | 3fb7e8b851b1ee6fa0c5d4b6ea4b525c141d5427 (patch) | |
| tree | 5cf0ea4c33c5e51ed25b2cf5a27998ce0920e833 /target | |
| parent | 25ca004f248b8a1166c9b3d645ae13aebf93b197 (diff) | |
| download | master-31e0f0ae-3fb7e8b851b1ee6fa0c5d4b6ea4b525c141d5427.tar.gz master-31e0f0ae-3fb7e8b851b1ee6fa0c5d4b6ea4b525c141d5427.tar.bz2 master-31e0f0ae-3fb7e8b851b1ee6fa0c5d4b6ea4b525c141d5427.zip | |
brcm47xx: add vectored interrupts
This adds support for vectored interrupts in this SoC.
This is supported by the 74K cpus.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 38975
Diffstat (limited to 'target')
| -rw-r--r-- | target/linux/brcm47xx/config-3.10 | 1 | ||||
| -rw-r--r-- | target/linux/brcm47xx/patches-3.10/110-MIPS-BCM47XX-add-vint-irq.patch | 66 |
2 files changed, 67 insertions, 0 deletions
diff --git a/target/linux/brcm47xx/config-3.10 b/target/linux/brcm47xx/config-3.10 index 78b69edb08..141bff0d2d 100644 --- a/target/linux/brcm47xx/config-3.10 +++ b/target/linux/brcm47xx/config-3.10 @@ -42,6 +42,7 @@ CONFIG_CPU_MIPS32=y CONFIG_CPU_MIPS32_R1=y # CONFIG_CPU_MIPS32_R2 is not set CONFIG_CPU_MIPSR1=y +CONFIG_CPU_MIPSR2_IRQ_VI=y CONFIG_CPU_R4K_CACHE_TLB=y CONFIG_CPU_R4K_FPU=y CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y diff --git a/target/linux/brcm47xx/patches-3.10/110-MIPS-BCM47XX-add-vint-irq.patch b/target/linux/brcm47xx/patches-3.10/110-MIPS-BCM47XX-add-vint-irq.patch new file mode 100644 index 0000000000..6351a9c4d4 --- /dev/null +++ b/target/linux/brcm47xx/patches-3.10/110-MIPS-BCM47XX-add-vint-irq.patch @@ -0,0 +1,66 @@ +From d9e8fd334d85fc8e4a2867655309a60c8de80883 Mon Sep 17 00:00:00 2001 +From: Hauke Mehrtens <hauke@hauke-m.de> +Date: Wed, 20 Nov 2013 23:03:35 +0100 +Subject: [PATCH 18/18] bcm47xx: add cpu_has_vint + +--- + arch/mips/bcm47xx/Kconfig | 1 + + arch/mips/bcm47xx/irq.c | 24 ++++++++++++++++++++++++ + 2 files changed, 25 insertions(+) + +--- a/arch/mips/bcm47xx/Kconfig ++++ b/arch/mips/bcm47xx/Kconfig +@@ -21,6 +21,7 @@ config BCM47XX_SSB + config BCM47XX_BCMA + bool "BCMA Support for Broadcom BCM47XX" + select SYS_HAS_CPU_MIPS32_R2 ++ select CPU_MIPSR2_IRQ_VI + select BCMA + select BCMA_HOST_SOC + select BCMA_DRIVER_MIPS +--- a/arch/mips/bcm47xx/irq.c ++++ b/arch/mips/bcm47xx/irq.c +@@ -25,6 +25,7 @@ + #include <linux/types.h> + #include <linux/interrupt.h> + #include <linux/irq.h> ++#include <asm/setup.h> + #include <asm/irq_cpu.h> + #include <bcm47xx.h> + +@@ -50,6 +51,18 @@ void plat_irq_dispatch(void) + do_IRQ(6); + } + ++#define DEFINE_HWx_IRQDISPATCH(x) \ ++ static void bcm47xx_hw ## x ## _irqdispatch(void) \ ++ { \ ++ do_IRQ(x); \ ++ } ++DEFINE_HWx_IRQDISPATCH(2) ++DEFINE_HWx_IRQDISPATCH(3) ++DEFINE_HWx_IRQDISPATCH(4) ++DEFINE_HWx_IRQDISPATCH(5) ++DEFINE_HWx_IRQDISPATCH(6) ++DEFINE_HWx_IRQDISPATCH(7) ++ + void __init arch_init_irq(void) + { + #ifdef CONFIG_BCM47XX_BCMA +@@ -63,5 +76,16 @@ void __init arch_init_irq(void) + cp0_compare_irq = 7; + } + #endif ++ + mips_cpu_irq_init(); ++ ++ if (cpu_has_vint) { ++ pr_info("Setting up vectored interrupts\n"); ++ set_vi_handler(2, bcm47xx_hw2_irqdispatch); ++ set_vi_handler(3, bcm47xx_hw3_irqdispatch); ++ set_vi_handler(4, bcm47xx_hw4_irqdispatch); ++ set_vi_handler(5, bcm47xx_hw5_irqdispatch); ++ set_vi_handler(6, bcm47xx_hw6_irqdispatch); ++ set_vi_handler(7, bcm47xx_hw7_irqdispatch); ++ } + } |