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author | Florian Fainelli <florian@openwrt.org> | 2007-04-02 16:59:59 +0000 |
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committer | Florian Fainelli <florian@openwrt.org> | 2007-04-02 16:59:59 +0000 |
commit | 3e8d73d762c0e473bcfa49dbdc488b48ba57e06a (patch) | |
tree | 49b3d3f10ddedb39df71c2cdac6b597d2115a6cc /target/linux/rb1xx-2.6/files/include | |
parent | 75262124ba989c05a5840d8ad878429589e68249 (diff) | |
download | master-31e0f0ae-3e8d73d762c0e473bcfa49dbdc488b48ba57e06a.tar.gz master-31e0f0ae-3e8d73d762c0e473bcfa49dbdc488b48ba57e06a.tar.bz2 master-31e0f0ae-3e8d73d762c0e473bcfa49dbdc488b48ba57e06a.zip |
Add preliminary RouterBoard RB1xx support
SVN-Revision: 6839
Diffstat (limited to 'target/linux/rb1xx-2.6/files/include')
4 files changed, 386 insertions, 0 deletions
diff --git a/target/linux/rb1xx-2.6/files/include/asm-mips/mach-adm5120/adm5120_defs.h b/target/linux/rb1xx-2.6/files/include/asm-mips/mach-adm5120/adm5120_defs.h new file mode 100644 index 0000000000..36979c225e --- /dev/null +++ b/target/linux/rb1xx-2.6/files/include/asm-mips/mach-adm5120/adm5120_defs.h @@ -0,0 +1,60 @@ +/* + * $Id$ + * + * ADM5120 SoC definitions + * + * This file defines some constants specific to the ADM5120 SoC + * + * Copyright (C) 2007 OpenWrt.org + * Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the + * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, + * Boston, MA 02110-1301, USA. + */ +#ifndef _ADM5120_DEFS_H +#define _ADM5120_DEFS_H + +#define ADM5120_SDRAM0_BASE 0x00000000 +#define ADM5120_SDRAM1_BASE 0x01000000 +#define ADM5120_SRAM1_BASE 0x10000000 +#define ADM5120_MPMC_BASE 0x11000000 +#define ADM5120_USBC_BASE 0x11200000 +#define ADM5120_PCIMEM_BASE 0x11400000 +#define ADM5120_PCIIO_BASE 0x11500000 +#define ADM5120_PCICFG_ADDR 0x115FFFF0 +#define ADM5120_PCICFG_DATA 0x115FFFF8 +#define ADM5120_SWITCH_BASE 0x12000000 +#define ADM5120_INTC_BASE 0x12200000 +#define ADM5120_UART0_BASE 0x12600000 +#define ADM5120_UART1_BASE 0x12800000 +#define ADM5120_SRAM0_BASE 0x1FC00000 + +#define ADM5120_MPMC_SIZE 0x1000 +#define ADM5120_USBC_SIZE 0x84 +#define ADM5120_PCIMEM_SIZE (ADM5120_PCIIO_BASE - ADM5120_PCIMEM_BASE) +#define ADM5120_PCIIO_SIZE (ADM5120_PCICFG_ADDR - ADM5120_PCIIO_BASE) +#define ADM5120_PCICFG_SIZE 0x10 +#define ADM5120_SWITCH_SIZE 0x114 +#define ADM5120_INTC_SIZE 0x28 +#define ADM5120_UART_SIZE 0x20 + +#define ADM5120_CLK_175 175000000 +#define ADM5120_CLK_200 200000000 +#define ADM5120_CLK_225 225000000 +#define ADM5120_CLK_250 250000000 + +#define ADM5120_UART_CLOCK 62500000 + +#endif /* _ADM5120_DEFS_H */ diff --git a/target/linux/rb1xx-2.6/files/include/asm-mips/mach-adm5120/adm5120_info.h b/target/linux/rb1xx-2.6/files/include/asm-mips/mach-adm5120/adm5120_info.h new file mode 100644 index 0000000000..df1f24d3aa --- /dev/null +++ b/target/linux/rb1xx-2.6/files/include/asm-mips/mach-adm5120/adm5120_info.h @@ -0,0 +1,70 @@ +/* + * $Id$ + * + * Copyright (C) 2007 OpenWrt.org + * Copyright (C) Gabor Juhos <juhosg@freemail.hu> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef _ADM5120_INFO_H +#define _ADM5120_INFO_H + +#include <linux/types.h> + +struct adm5120_info { + unsigned int product_code; + unsigned int revision; + unsigned int cpu_package; + unsigned int nand_boot; + unsigned long cpu_speed; + unsigned int boot_loader; + unsigned int board_type; + unsigned int num_iface; +}; + +#define CPU_SPEED_175 175000000 +#define CPU_SPEED_200 200000000 +#define CPU_SPEED_225 225000000 +#define CPU_SPEED_250 250000000 + +#define CPU_PACKAGE_PQFP 0 +#define CPU_PACKAGE_BGA 1 + +#define BOOT_LOADER_UNKNOWN 0 +#define BOOT_LOADER_CFE 1 +#define BOOT_LOADER_UBOOT 2 +#define BOOT_LOADER_MYLOADER 3 +#define BOOT_LOADER_ROUTERBOOT 4 +#define BOOT_LOADER_LAST 4 + +#define BOARD_TYPE_UNKNOWN 0 +#define BOARD_TYPE_WP54G_WRT 1 +#define BOARD_TYPE_WP54G 2 +#define BOARD_TYPE_WP54AG 3 +#define BOARD_TYPE_WPP54G 4 +#define BOARD_TYPE_WPP54AG 5 +#define BOARD_TYPE_NP28G 6 +#define BOARD_TYPE_NP28GHS 7 +#define BOARD_TYPE_NP27G 8 +#define BOARD_TYPE_WP54Gv1C 9 +#define BOARD_TYPE_RB_111 10 +#define BOARD_TYPE_RB_112 11 +#define BOARD_TYPE_RB_133 12 +#define BOARD_TYPE_RB_133C 13 +#define BOARD_TYPE_RB_150 14 +#define BOARD_TYPE_RB_153 15 +#define BOART_TYPE_LAST 15 + +extern struct adm5120_info adm5120_info; +extern void adm5120_info_init(void); + +static inline int adm5120_has_pci(void) +{ + return (adm5120_info.cpu_package == CPU_PACKAGE_BGA); +} + +#endif /* _ADM5120_INFO_H */ diff --git a/target/linux/rb1xx-2.6/files/include/asm-mips/mach-adm5120/adm5120_switch.h b/target/linux/rb1xx-2.6/files/include/asm-mips/mach-adm5120/adm5120_switch.h new file mode 100644 index 0000000000..52ea79e7ab --- /dev/null +++ b/target/linux/rb1xx-2.6/files/include/asm-mips/mach-adm5120/adm5120_switch.h @@ -0,0 +1,89 @@ +/* + * ADM5120 ethernet switch definitions + * + * This header file defines the hardware registers of the ADM5120 SoC + * built-in Ethernet switch. + * + * Copyright (C) 2007 OpenWrt.org + * Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the + * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, + * Boston, MA 02110-1301, USA. + */ + +#ifndef _ADM5120_SWITCH_H +#define _ADM5120_SWITCH_H + +#define BITMASK(len) ((1 << (len))-1) +#define ONEBIT(at) (1 << (at)) + +/* Switch register offsets */ +#define SWITCH_REG_CODE 0x0000 +#define SWITCH_REG_SOFT_RESET 0x0004 +#define SWITCH_REG_MEMCTRL 0x001C +#define SWITCH_REG_CPUP_CONF 0x0024 +#define SWITCH_REG_PORT_CONF0 0x0028 +#define SWITCH_REG_PORT_CONF1 0x002C +#define SWITCH_REG_PORT_CONF2 0x0030 +#define SWITCH_REG_VLAN_G1 0x0040 +#define SWITCH_REG_VLAN_G2 0x0044 +#define SWITCH_REG_SEND_TRIG 0x0048 +#define SWITCH_REG_MAC_WT0 0x0058 +#define SWITCH_REG_MAC_WT1 0x005C +#define SWITCH_REG_PHY_CNTL0 0x0068 +#define SWITCH_REG_PHY_CNTL1 0x006C +#define SWITCH_REG_PHY_CNTL2 0x007C +#define SWITCH_REG_PHY_CNTL3 0x0080 +#define SWITCH_REG_PRI_CNTL 0x0084 +#define SWITCH_REG_INT_STATUS 0x00B0 +#define SWITCH_REG_INT_MASK 0x00B4 +#define SWITCH_REG_GPIO_CONF0 0x00B8 +#define SWITCH_REG_GPIO_CONF2 0x00BC +#define SWITCH_REG_WDOG0 0x00C0 +#define SWITCH_REG_WDOG1 0x00C4 +#define SWITCH_REG_PHY_CNTL4 0x00A0 + +#define SWITCH_REG_SEND_HBADDR 0x00D0 +#define SWITCH_REG_SEND_LBADDR 0x00D4 +#define SWITCH_REG_RECV_HBADDR 0x00D8 +#define SWITCH_REG_RECV_LBADDR 0x00DC + +#define SWITCH_REG_TIMER_INT 0x00F0 +#define SWITCH_REG_TIMER 0x00F4 + +#define SWITCH_REG_PORT0_LED 0x0100 +#define SWITCH_REG_PORT1_LED 0x0104 +#define SWITCH_REG_PORT2_LED 0x0108 +#define SWITCH_REG_PORT3_LED 0x010C +#define SWITCH_REG_PORT4_LED 0x0110 + +/* CODE register bits */ +#define CODE_PC_MASK BITMASK(16) /* Product Code */ +#define CODE_REV_SHIFT 16 +#define CODE_REV_MASK BITMASK(4) /* Product Revision */ +#define CODE_CLKS_SHIFT 20 +#define CODE_CLKS_MASK BITMASK(2) /* Clock Speed */ +#define CODE_CLKS_175 0 /* 175 MHz */ +#define CODE_CLKS_200 1 /* 200 MHz */ +#define CODE_CLKS_225 2 /* 225 MHz */ +#define CODE_CLKS_250 3 /* 250 MHz */ +#define CODE_NAB ONEBIT(24) /* NAND boot */ +#define CODE_PK_MASK BITMASK(1) /* Package type */ +#define CODE_PK_SHIFT 29 +#define CODE_PK_BGA 0 /* BGA package */ +#define CODE_PK_PQFP 1 /* PQFP package */ + + +#endif /* _ADM5120_SWITCH_H */ diff --git a/target/linux/rb1xx-2.6/files/include/asm-mips/mach-adm5120/myloader.h b/target/linux/rb1xx-2.6/files/include/asm-mips/mach-adm5120/myloader.h new file mode 100644 index 0000000000..3c0c6021b1 --- /dev/null +++ b/target/linux/rb1xx-2.6/files/include/asm-mips/mach-adm5120/myloader.h @@ -0,0 +1,167 @@ +/* + * Copyright (C) 2006,2007 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#ifndef _MYLOADER_H_ +#define _MYLOADER_H_ + +/* + * Firmware file format: + * + * <header> + * [<block descriptor 0>] + * ... + * [<block descriptor n>] + * <null block descriptor> + * [<block data 0>] + * ... + * [<block data n>] + * + * + */ + +/* Myloader specific magic numbers */ +#define MYLO_MAGIC_FIRMWARE 0x4C594D00 +#define MYLO_MAGIC_20021103 0x20021103 +#define MYLO_MAGIC_20021107 0x20021107 + +#define MYLO_MAGIC_SYS_PARAMS MYLO_MAGIC_20021107 +#define MYLO_MAGIC_PARTITIONS MYLO_MAGIC_20021103 +#define MYLO_MAGIC_BOARD_PARAMS MYLO_MAGIC_20021103 + +/* + * Addresses of the data structures provided by MyLoader + */ +#define MYLO_MIPS_SYS_PARAMS 0x80000800 /* System Parameters */ +#define MYLO_MIPS_BOARD_PARAMS 0x80000A00 /* Board Parameters */ +#define MYLO_MIPS_PARTITIONS 0x80000C00 /* Partition Table */ +#define MYLO_MIPS_BOOT_PARAMS 0x80000E00 /* Boot Parameters */ + +/* Vendor ID's (seems to be same as the PCI vendor ID's) */ +#define VENID_COMPEX 0x11F6 + +/* Devices based on the ADM5120 */ +#define DEVID_COMPEX_NP27G 0x0078 +#define DEVID_COMPEX_NP28G 0x044C +#define DEVID_COMPEX_NP28GHS 0x044E +#define DEVID_COMPEX_WP54Gv1C 0x0514 +#define DEVID_COMPEX_WP54G 0x0515 +#define DEVID_COMPEX_WP54AG 0x0546 +#define DEVID_COMPEX_WPP54AG 0x0550 +#define DEVID_COMPEX_WPP54G 0x0555 + +/* Devices based on the IXP422 */ +#define DEVID_COMPEX_WP18 0x047E +#define DEVID_COMPEX_NP18A 0x0489 + +/* Other devices */ +#define DEVID_COMPEX_NP26G8M 0x03E8 +#define DEVID_COMPEX_NP26G16M 0x03E9 + +struct mylo_fw_header { + uint32_t magic; /* must be MYLO_MAGIC_FIRMWARE */ + uint32_t crc; /* CRC of the whole firmware */ + uint32_t res0; /* unknown/unused */ + uint32_t res1; /* unknown/unused */ + uint16_t vid; /* vendor ID */ + uint16_t did; /* device ID */ + uint16_t svid; /* sub vendor ID */ + uint16_t sdid; /* sub device ID */ + uint32_t rev; /* device revision */ + uint32_t fwhi; /* FIXME: firmware version high? */ + uint32_t fwlo; /* FIXME: firmware version low? */ + uint32_t flags; /* firmware flags */ +}; + +#define FW_FLAG_BOARD_PARAMS_WP 0x01 /* board parameters are write protected */ +#define FW_FLAG_BOOT_SECTOR_WE 0x02 /* enable of write boot sectors (below 64K) */ + +struct mylo_fw_blockdesc { + uint32_t type; /* block type */ + uint32_t addr; /* relative address to flash start */ + uint32_t dlen; /* size of block data in bytes */ + uint32_t blen; /* total size of block in bytes */ +}; + +#define FW_DESC_TYPE_UNUSED 0 +#define FW_DESC_TYPE_USED 1 + +struct mylo_partition { + uint16_t flags; /* partition flags */ + uint16_t type; /* type of the partition */ + uint32_t addr; /* relative address of the partition from the + flash start */ + uint32_t size; /* size of the partition in bytes */ + uint32_t param; /* if this is the active partition, the + MyLoader load code to this address */ +}; + +#define PARTITION_FLAG_ACTIVE 0x8000 /* this is the active partition, + * MyLoader loads firmware from here */ +#define PARTITION_FLAG_ISRAM 0x2000 /* FIXME: this is a RAM partition? */ +#define PARTIIION_FLAG_RAMLOAD 0x1000 /* FIXME: load this partition into the RAM? */ +#define PARTITION_FLAG_PRELOAD 0x0800 /* the partition data preloaded to RAM + * before decompression */ +#define PARTITION_FLAG_HAVEHDR 0x0002 /* the partition data have a header */ + +#define PARTITION_TYPE_FREE 0 +#define PARTITION_TYPE_USED 1 + +#define MYLO_MAX_PARTITIONS 8 /* maximum number of partitions in the + partition table */ + +struct mylo_partition_table { + uint32_t magic; /* must be MYLO_MAGIC_PARTITIONS */ + uint32_t res0; /* unknown/unused */ + uint32_t res1; /* unknown/unused */ + uint32_t res2; /* unknown/unused */ + struct mylo_partition partitions[MYLO_MAX_PARTITIONS]; +}; + +struct mylo_partition_header { + uint32_t len; /* length of the partition data */ + uint32_t crc; /* CRC value of the partition data */ +}; + +struct mylo_system_params { + uint32_t magic; /* must be MYLO_MAGIC_SYS_PARAMS */ + uint32_t res0; + uint32_t res1; + uint32_t mylo_ver; + uint16_t vid; /* Vendor ID */ + uint16_t did; /* Device ID */ + uint16_t svid; /* Sub Vendor ID */ + uint16_t sdid; /* Sub Device ID */ + uint32_t rev; /* device revision */ + uint32_t fwhi; + uint32_t fwlo; + uint32_t tftp_addr; + uint32_t prog_start; + uint32_t flash_size; /* Size of boot FLASH in bytes */ + uint32_t dram_size; /* Size of onboard RAM in bytes */ +}; + + +struct mylo_eth_addr { + uint8_t mac[6]; + uint8_t csum[2]; +}; + +#define MYLO_ETHADDR_COUNT 8 /* maximum number of ethernet address + in the board parameters */ + +struct mylo_board_params { + uint32_t magic; /* must be MYLO_MAGIC_BOARD_PARAMS */ + uint32_t res0; + uint32_t res1; + uint32_t res2; + struct mylo_eth_addr addr[MYLO_ETHADDR_COUNT]; +}; + +#endif /* _MYLOADER_H_*/ |