summaryrefslogtreecommitdiffstats
path: root/target/linux/ramips/patches-3.8/0012-Document-devicetree-add-OF-documents-for-MIPS-interr.patch
diff options
context:
space:
mode:
authorJohn Crispin <john@openwrt.org>2013-04-03 09:59:10 +0000
committerJohn Crispin <john@openwrt.org>2013-04-03 09:59:10 +0000
commit46f141637c81ad0508cced2496678461d638cb39 (patch)
tree0339883c1042298f9df733f2ec4ffc61de8a5be1 /target/linux/ramips/patches-3.8/0012-Document-devicetree-add-OF-documents-for-MIPS-interr.patch
parent4f86ea43ca3ae3b670da308166f9a91f36e69f3a (diff)
downloadmaster-31e0f0ae-46f141637c81ad0508cced2496678461d638cb39.tar.gz
master-31e0f0ae-46f141637c81ad0508cced2496678461d638cb39.tar.bz2
master-31e0f0ae-46f141637c81ad0508cced2496678461d638cb39.zip
add patches for v3.8
Signed-off-by: John Crsipin <blogic@openwrt.org> SVN-Revision: 36163
Diffstat (limited to 'target/linux/ramips/patches-3.8/0012-Document-devicetree-add-OF-documents-for-MIPS-interr.patch')
-rw-r--r--target/linux/ramips/patches-3.8/0012-Document-devicetree-add-OF-documents-for-MIPS-interr.patch70
1 files changed, 70 insertions, 0 deletions
diff --git a/target/linux/ramips/patches-3.8/0012-Document-devicetree-add-OF-documents-for-MIPS-interr.patch b/target/linux/ramips/patches-3.8/0012-Document-devicetree-add-OF-documents-for-MIPS-interr.patch
new file mode 100644
index 0000000000..9632cc22de
--- /dev/null
+++ b/target/linux/ramips/patches-3.8/0012-Document-devicetree-add-OF-documents-for-MIPS-interr.patch
@@ -0,0 +1,70 @@
+From dcc7310e144c3bf17a86d2f058d60fb525d4b34a Mon Sep 17 00:00:00 2001
+From: John Crispin <blogic@openwrt.org>
+Date: Thu, 31 Jan 2013 13:44:10 +0100
+Subject: [PATCH 12/14] Document: devicetree: add OF documents for MIPS
+ interrupt controller
+
+Signed-off-by: John Crispin <blogic@openwrt.org>
+Acked-by: David Daney <david.daney@cavium.com>
+Patchwork: http://patchwork.linux-mips.org/patch/4901/
+---
+ Documentation/devicetree/bindings/mips/cpu_irq.txt | 47 ++++++++++++++++++++
+ 1 file changed, 47 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/mips/cpu_irq.txt
+
+diff --git a/Documentation/devicetree/bindings/mips/cpu_irq.txt b/Documentation/devicetree/bindings/mips/cpu_irq.txt
+new file mode 100644
+index 0000000..13aa4b6
+--- /dev/null
++++ b/Documentation/devicetree/bindings/mips/cpu_irq.txt
+@@ -0,0 +1,47 @@
++MIPS CPU interrupt controller
++
++On MIPS the mips_cpu_intc_init() helper can be used to initialize the 8 CPU
++IRQs from a devicetree file and create a irq_domain for IRQ controller.
++
++With the irq_domain in place we can describe how the 8 IRQs are wired to the
++platforms internal interrupt controller cascade.
++
++Below is an example of a platform describing the cascade inside the devicetree
++and the code used to load it inside arch_init_irq().
++
++Required properties:
++- compatible : Should be "mti,cpu-interrupt-controller"
++
++Example devicetree:
++ cpu-irq: cpu-irq@0 {
++ #address-cells = <0>;
++
++ interrupt-controller;
++ #interrupt-cells = <1>;
++
++ compatible = "mti,cpu-interrupt-controller";
++ };
++
++ intc: intc@200 {
++ compatible = "ralink,rt2880-intc";
++ reg = <0x200 0x100>;
++
++ interrupt-controller;
++ #interrupt-cells = <1>;
++
++ interrupt-parent = <&cpu-irq>;
++ interrupts = <2>;
++ };
++
++
++Example platform irq.c:
++static struct of_device_id __initdata of_irq_ids[] = {
++ { .compatible = "mti,cpu-interrupt-controller", .data = mips_cpu_intc_init },
++ { .compatible = "ralink,rt2880-intc", .data = intc_of_init },
++ {},
++};
++
++void __init arch_init_irq(void)
++{
++ of_irq_init(of_irq_ids);
++}
+--
+1.7.10.4
+