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| author | John Crispin <john@openwrt.org> | 2014-09-12 06:50:46 +0000 |
|---|---|---|
| committer | John Crispin <john@openwrt.org> | 2014-09-12 06:50:46 +0000 |
| commit | 17cf9c45934fe054b945aa00757d1f9509de68be (patch) | |
| tree | 97544f271aea1dd03fa66a6b04a9555c5096c0d6 /target/linux/ramips/patches-3.10/0014-MIPS-ralink-mt7620-add-spi-clock-definition.patch | |
| parent | e2864e9990e2bbc511e7f767ac7c264530471aa9 (diff) | |
| download | master-31e0f0ae-17cf9c45934fe054b945aa00757d1f9509de68be.tar.gz master-31e0f0ae-17cf9c45934fe054b945aa00757d1f9509de68be.tar.bz2 master-31e0f0ae-17cf9c45934fe054b945aa00757d1f9509de68be.zip | |
ralink: drop 3.10 support
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 42481
Diffstat (limited to 'target/linux/ramips/patches-3.10/0014-MIPS-ralink-mt7620-add-spi-clock-definition.patch')
| -rw-r--r-- | target/linux/ramips/patches-3.10/0014-MIPS-ralink-mt7620-add-spi-clock-definition.patch | 22 |
1 files changed, 0 insertions, 22 deletions
diff --git a/target/linux/ramips/patches-3.10/0014-MIPS-ralink-mt7620-add-spi-clock-definition.patch b/target/linux/ramips/patches-3.10/0014-MIPS-ralink-mt7620-add-spi-clock-definition.patch deleted file mode 100644 index 16b89dc832..0000000000 --- a/target/linux/ramips/patches-3.10/0014-MIPS-ralink-mt7620-add-spi-clock-definition.patch +++ /dev/null @@ -1,22 +0,0 @@ -From d0da9f08ef37e9f639e3b7995d722684da2410a2 Mon Sep 17 00:00:00 2001 -From: John Crispin <blogic@openwrt.org> -Date: Thu, 23 May 2013 18:46:25 +0200 -Subject: [PATCH 14/25] MIPS: ralink: mt7620: add spi clock definition - -The definition of the spi clock is missing. - -Signed-off-by: John Crispin <blogic@openwrt.org> ---- - arch/mips/ralink/mt7620.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/arch/mips/ralink/mt7620.c -+++ b/arch/mips/ralink/mt7620.c -@@ -167,6 +167,7 @@ void __init ralink_clk_init(void) - ralink_clk_add("cpu", cpu_rate); - ralink_clk_add("10000100.timer", 40000000); - ralink_clk_add("10000500.uart", 40000000); -+ ralink_clk_add("10000b00.spi", 40000000); - ralink_clk_add("10000c00.uartlite", 40000000); - } - |