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author | Gabor Juhos <juhosg@openwrt.org> | 2009-10-05 18:44:13 +0000 |
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committer | Gabor Juhos <juhosg@openwrt.org> | 2009-10-05 18:44:13 +0000 |
commit | 5a379453178efb9345976613180b1a97e30ee924 (patch) | |
tree | 44e3ff01796da4dd1a2f1482dfa453b0f137a3e5 /target/linux/ramips/files/arch | |
parent | 0e0e945e33da955216c1471dc15af59b39cf708e (diff) | |
download | master-31e0f0ae-5a379453178efb9345976613180b1a97e30ee924.tar.gz master-31e0f0ae-5a379453178efb9345976613180b1a97e30ee924.tar.bz2 master-31e0f0ae-5a379453178efb9345976613180b1a97e30ee924.zip |
ramips: rt288x pci code cleanup
SVN-Revision: 17916
Diffstat (limited to 'target/linux/ramips/files/arch')
-rw-r--r-- | target/linux/ramips/files/arch/mips/pci/pci-rt288x.c | 36 |
1 files changed, 17 insertions, 19 deletions
diff --git a/target/linux/ramips/files/arch/mips/pci/pci-rt288x.c b/target/linux/ramips/files/arch/mips/pci/pci-rt288x.c index dc4aa4837f..08f62871fa 100644 --- a/target/linux/ramips/files/arch/mips/pci/pci-rt288x.c +++ b/target/linux/ramips/files/arch/mips/pci/pci-rt288x.c @@ -42,8 +42,8 @@ static int config_access(unsigned char access_type, struct pci_bus *bus, return 0; } -int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where, - int size, u32 *val) +static int rt2880_pci_config_read(struct pci_bus *bus, unsigned int devfn, + int where, int size, u32 *val) { u32 data = 0; @@ -60,8 +60,8 @@ int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where, return PCIBIOS_SUCCESSFUL; } -int pci_config_write(struct pci_bus *bus, unsigned int devfn, - int where, int size, u32 val) +static int rt2880_pci_config_write(struct pci_bus *bus, unsigned int devfn, + int where, int size, u32 val) { u32 data = 0; @@ -84,31 +84,29 @@ int pci_config_write(struct pci_bus *bus, unsigned int devfn, return PCIBIOS_SUCCESSFUL; } -struct pci_ops rt2880_pci_ops = { - .read = pci_config_read, - .write = pci_config_write, +static struct pci_ops rt2880_pci_ops = { + .read = rt2880_pci_config_read, + .write = rt2880_pci_config_write, }; -static struct resource pci_io_resource = { - .name = "pci MEM space", +static struct resource rt2880_pci_io_resource = { + .name = "PCI MEM space", .start = 0x20000000, .end = 0x2FFFFFFF, .flags = IORESOURCE_MEM, }; -static struct resource pci_mem_resource = { - .name = "pci IO space", +static struct resource rt2880_pci_mem_resource = { + .name = "PCI IO space", .start = 0x00460000, .end = 0x0046FFFF, .flags = IORESOURCE_IO, }; -struct pci_controller rt2880_controller = { +static struct pci_controller rt2880_pci_controller = { .pci_ops = &rt2880_pci_ops, - .mem_resource = &pci_io_resource, - .io_resource = &pci_mem_resource, - .mem_offset = 0x00000000UL, - .io_offset = 0x00000000UL, + .mem_resource = &rt2880_pci_io_resource, + .io_resource = &rt2880_pci_mem_resource, }; void inline read_config(unsigned long bus, unsigned long dev, @@ -171,7 +169,7 @@ int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) return irq; } -int init_rt2880pci(void) +static int __init rt2880_pci_init(void) { unsigned long val = 0; int i; @@ -191,7 +189,7 @@ int init_rt2880pci(void) write_config(0, 0, 0, PCI_BASE_ADDRESS_0, 0x08000000); read_config(0, 0, 0, PCI_BASE_ADDRESS_0, &val); - register_pci_controller(&rt2880_controller); + register_pci_controller(&rt2880_pci_controller); return 0; } @@ -204,4 +202,4 @@ struct pci_fixup pcibios_fixups[] = { {0} }; -arch_initcall(init_rt2880pci); +arch_initcall(rt2880_pci_init); |