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| author | Gabor Juhos <juhosg@openwrt.org> | 2012-02-14 17:32:42 +0000 |
|---|---|---|
| committer | Gabor Juhos <juhosg@openwrt.org> | 2012-02-14 17:32:42 +0000 |
| commit | 784be92e398ef9b1c26caaf617af0f3bfc2ee91b (patch) | |
| tree | dcbe7f507d881b56b7d6746da9ed3131a964794e /target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt3883.h | |
| parent | 10f00dc48b1eceb2c5219b0ff9ddb42f782797bf (diff) | |
| download | master-31e0f0ae-784be92e398ef9b1c26caaf617af0f3bfc2ee91b.tar.gz master-31e0f0ae-784be92e398ef9b1c26caaf617af0f3bfc2ee91b.tar.bz2 master-31e0f0ae-784be92e398ef9b1c26caaf617af0f3bfc2ee91b.zip | |
ramips: rt3883: add PCI support
SVN-Revision: 30527
Diffstat (limited to 'target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt3883.h')
| -rw-r--r-- | target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt3883.h | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt3883.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt3883.h index 004acfb73b..a7a4b074ab 100644 --- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt3883.h +++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt3883.h @@ -26,6 +26,9 @@ void rt3883_detect_sys_type(void); #define RT3883_INTC_IRQ_BASE (RT3883_CPU_IRQ_BASE + RT3883_CPU_IRQ_COUNT) #define RT3883_INTC_IRQ_COUNT 32 #define RT3883_GPIO_IRQ_BASE (RT3883_INTC_IRQ_BASE + RT3883_INTC_IRQ_COUNT) +#define RT3883_GPIO_IRQ_COUNT 96 +#define RT3883_PCI_IRQ_BASE (RT3883_GPIO_IRQ_BASE + RT3883_GPIO_IRQ_COUNT) +#define RT3883_PCI_IRQ_COUNT 3 #define RT3883_CPU_IRQ_INTC (RT3883_CPU_IRQ_BASE + 2) #define RT3883_CPU_IRQ_PCI (RT3883_CPU_IRQ_BASE + 4) @@ -48,6 +51,10 @@ void rt3883_detect_sys_type(void); #define RT3883_INTC_IRQ_UHST (RT3883_INTC_IRQ_BASE + 18) #define RT3883_INTC_IRQ_UDEV (RT3883_INTC_IRQ_BASE + 19) +#define RT3883_PCI_IRQ_PCI0 (RT3883_PCI_IRQ_BASE + 0) +#define RT3883_PCI_IRQ_PCI1 (RT3883_PCI_IRQ_BASE + 1) +#define RT3883_PCI_IRQ_PCIE (RT3883_PCI_IRQ_BASE + 2) + extern void __iomem *rt3883_sysc_base; extern void __iomem *rt3883_memc_base; @@ -130,4 +137,19 @@ static inline u32 rt3883_memc_rr(unsigned reg) void rt3883_gpio_init(u32 mode); +#define RT3883_PCI_MODE_PCI 0x01 +#define RT3883_PCI_MODE_PCIE 0x02 +#define RT3883_PCI_MODE_BOTH (RT3883_PCI_MODE_PCI | RT3883_PCI_MODE_PCIE) + +struct pci_dev; + +#ifdef CONFIG_PCI +void rt3883_pci_init(unsigned mode); +void rt3883_pci_set_plat_dev_init(int (*f)(struct pci_dev *)); +#else +static inline void rt3883_pci_init(unsigned mode) {} +static inline void rt3883_pci_set_plat_dev_init(int (*f)(struct pci_dev *)) {} +} +#endif /* CONFIG_PCI */ + #endif /* _RT3883_H_ */ |