summaryrefslogtreecommitdiffstats
path: root/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_pci.h
diff options
context:
space:
mode:
authorGabor Juhos <juhosg@openwrt.org>2009-10-05 18:44:06 +0000
committerGabor Juhos <juhosg@openwrt.org>2009-10-05 18:44:06 +0000
commit6ceea98b0a1c751710d03d874f3f4254846887a9 (patch)
tree0d7e8188484707e19618f5679d00a2c7c7f15c69 /target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_pci.h
parent4674fd1eae2dc0a0b461f40d24328cef6ca65462 (diff)
downloadmaster-31e0f0ae-6ceea98b0a1c751710d03d874f3f4254846887a9.tar.gz
master-31e0f0ae-6ceea98b0a1c751710d03d874f3f4254846887a9.tar.bz2
master-31e0f0ae-6ceea98b0a1c751710d03d874f3f4254846887a9.zip
ramips: merge ops-rt288x.c and rt288x_pci.h into pci-rt288x.c
SVN-Revision: 17914
Diffstat (limited to 'target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_pci.h')
-rw-r--r--target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_pci.h19
1 files changed, 0 insertions, 19 deletions
diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_pci.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_pci.h
deleted file mode 100644
index f73d7ac151..0000000000
--- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_pci.h
+++ /dev/null
@@ -1,19 +0,0 @@
-
-#ifdef CONFIG_PCI
-
-#define RT2880_PCI_SLOT1_BASE 0x20000000
-#define RALINK_PCI_BASE 0xA0440000
-#define RT2880_PCI_PCICFG_ADDR ((unsigned long*)(RALINK_PCI_BASE + 0x0000))
-#define RT2880_PCI_ARBCTL ((unsigned long*)(RALINK_PCI_BASE + 0x0080))
-#define RT2880_PCI_BAR0SETUP_ADDR ((unsigned long*)(RALINK_PCI_BASE + 0x0010))
-#define RT2880_PCI_CONFIG_ADDR ((unsigned long*)(RALINK_PCI_BASE + 0x0020))
-#define RT2880_PCI_CONFIG_DATA ((unsigned long*)(RALINK_PCI_BASE + 0x0024))
-#define RT2880_PCI_MEMBASE ((unsigned long*)(RALINK_PCI_BASE + 0x0028))
-#define RT2880_PCI_IOBASE ((unsigned long*)(RALINK_PCI_BASE + 0x002C))
-#define RT2880_PCI_IMBASEBAR0_ADDR ((unsigned long*)(RALINK_PCI_BASE + 0x0018))
-#define RT2880_PCI_ID ((unsigned long*)(RALINK_PCI_BASE + 0x0030))
-#define RT2880_PCI_CLASS ((unsigned long*)(RALINK_PCI_BASE + 0x0034))
-#define RT2880_PCI_SUBID ((unsigned long*)(RALINK_PCI_BASE + 0x0038))
-#define RT2880_PCI_PCIMSK_ADDR ((unsigned long*)(RALINK_PCI_BASE + 0x000C))
-
-#endif