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| author | John Crispin <john@openwrt.org> | 2015-12-12 06:42:05 +0000 |
|---|---|---|
| committer | John Crispin <john@openwrt.org> | 2015-12-12 06:42:05 +0000 |
| commit | e610cdfc8ab936ad734cf15a414574b69001b634 (patch) | |
| tree | 2ac957b34100f5167c6f305bc551fdf135c361e4 /target/linux/ramips/dts/mt7621.dtsi | |
| parent | 0b6271faf475a74cdd5b9d0c19ebba5298b4de8c (diff) | |
| download | master-31e0f0ae-e610cdfc8ab936ad734cf15a414574b69001b634.tar.gz master-31e0f0ae-e610cdfc8ab936ad734cf15a414574b69001b634.tar.bz2 master-31e0f0ae-e610cdfc8ab936ad734cf15a414574b69001b634.zip | |
ramips: use gic timer as clocksource for mt7621
* Switches clocksource to gic timer.
* Moves frequency definitions to dtsi since frequency was hardcoded anyway
Will work on proper frequency detection later.
Signed-off-by: Nikolay Martynov <mar.kolya@gmail.com>
SVN-Revision: 47875
Diffstat (limited to 'target/linux/ramips/dts/mt7621.dtsi')
| -rw-r--r-- | target/linux/ramips/dts/mt7621.dtsi | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/target/linux/ramips/dts/mt7621.dtsi b/target/linux/ramips/dts/mt7621.dtsi index a06aee733b..9c6f45b1e0 100644 --- a/target/linux/ramips/dts/mt7621.dtsi +++ b/target/linux/ramips/dts/mt7621.dtsi @@ -22,6 +22,22 @@ compatible = "mti,cpu-interrupt-controller"; }; + cpuclock: cpuclock@0 { + #clock-cells = <0>; + compatible = "fixed-clock"; + + /* FIXME: there should be way to detect this */ + clock-frequency = <880000000>; + }; + + sysclock: sysclock@0 { + #clock-cells = <0>; + compatible = "fixed-clock"; + + /* FIXME: there should be way to detect this */ + clock-frequency = <50000000>; + }; + palmbus@1E000000 { compatible = "palmbus"; reg = <0x1E000000 0x100000>; @@ -88,6 +104,8 @@ compatible = "ns16550a"; reg = <0xc00 0x100>; + clocks = <&sysclock>; + interrupt-parent = <&gic>; interrupts = <GIC_SHARED 26 IRQ_TYPE_LEVEL_HIGH>; @@ -102,6 +120,8 @@ compatible = "ralink,mt7621-spi"; reg = <0xb00 0x100>; + clocks = <&sysclock>; + resets = <&rstctrl 18>; reset-names = "spi"; @@ -243,6 +263,12 @@ #interrupt-cells = <3>; mti,reserved-cpu-vectors = <7>; + + timer { + compatible = "mti,gic-timer"; + interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>; + clocks = <&cpuclock>; + }; }; nand@1e003000 { |