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authorL. D. Pinney <ldpinney@gmail.com>2016-07-06 19:24:52 -0500
committerJohn Crispin <john@phrozen.org>2016-07-11 14:19:47 +0200
commitcf8c77be6becf3c5e40e19e9c4ab0d0abdfb9291 (patch)
treeaff54a5e720a3452141a9a133e74df06a4044d17 /target/linux/ramips/dts/NIXCORE.dtsi
parent88765756013548cc86cb95c585e22079622b588c (diff)
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ramips: Add support for the NixCore X1 Module
The NixCore X1 is a Ralink/MediaTek rt5350 WiFi Module. http://nixcores.com/ Signed-off-by: L. D. Pinney <ldpinney@gmail.com> Acked-by: Drew Gaylo <drew@nixcores.com>
Diffstat (limited to 'target/linux/ramips/dts/NIXCORE.dtsi')
-rw-r--r--target/linux/ramips/dts/NIXCORE.dtsi154
1 files changed, 154 insertions, 0 deletions
diff --git a/target/linux/ramips/dts/NIXCORE.dtsi b/target/linux/ramips/dts/NIXCORE.dtsi
new file mode 100644
index 0000000000..4c233d24ba
--- /dev/null
+++ b/target/linux/ramips/dts/NIXCORE.dtsi
@@ -0,0 +1,154 @@
+#include "rt5350.dtsi"
+
+/ {
+ compatible = "Nixcore", "ralink,rt5350-soc";
+ model = "Nixcore";
+
+ chosen {
+ bootargs = "console=ttyS1,57600";
+ };
+
+ gpio-export {
+ compatible = "gpio-export";
+ #size-cells = <0>;
+
+ gpio0 {
+ gpio-export,name = "gpio0";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio0 0 0>;
+ };
+
+ gpio1 {
+ gpio-export,name = "gpio1";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio1 0 0>;
+ };
+
+ /* GPIOs 1-6 are I2C,SPI */
+ /* GPIO 7-14 are uart1 */
+ /* GPIOs 15 & 16 are uart2 */
+ /* JTAG */
+
+ gpio17 {
+ /* JTAG_TDO */
+ gpio-export,name = "gpio17";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio0 17 0>;
+ };
+
+ gpio18 {
+ /* JTAG_TDI */
+ gpio-export,name = "gpio18";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio0 18 0>;
+ };
+
+ gpio19 {
+ /* JTAG_TMS */
+ gpio-export,name = "gpio19";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio0 19 0>;
+ };
+
+ gpio20 {
+ /* JTAG_TCLK */
+ gpio-export,name = "gpio20";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio0 20 0>;
+ };
+
+ gpio21 {
+ /* JTAG_TRST_N */
+ gpio-export,name = "gpio21";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio0 21 0>;
+ };
+
+ /* ETH LEDs */
+ /*
+ gpio22 {
+ gpio-export,name = "gpio22";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio1 0 0>;
+ };
+
+ gpio23 {
+ gpio-export,name = "gpio23";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio1 1 0>;
+ };
+
+ gpio24 {
+ gpio-export,name = "gpio24";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio1 2 0>;
+ };
+
+ gpio25 {
+ gpio-export,name = "gpio25";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio1 3 0>;
+ };
+
+ */
+ gpio26 {
+ /* ETH4_LED */
+ gpio-export,name = "gpio26";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio1 4 0>;
+ };
+
+ gpio27 {
+ /* spi_cs1 */
+ gpio-export,name = "gpio27";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio1 5 0>;
+ };
+ };
+};
+
+&gpio0 {
+ status = "okay";
+};
+
+&gpio1 {
+ status = "okay";
+};
+
+&i2c {
+ status = "okay";
+};
+
+&uart {
+ status = "okay";
+ reset-names = "gpio uartf";
+};
+
+&pinctrl {
+ state_default: pinctrl0 {
+ gpio {
+ ralink,group = "jtag", "led", "spi_cs1";
+ ralink,function = "gpio";
+ };
+ };
+};
+
+&ethernet {
+ mtd-mac-address = <&factory 0x4>;
+};
+
+&esw {
+ mediatek,portmap = <0x17>;
+};
+
+&wmac {
+ ralink,mtd-eeprom = <&factory 0>;
+};
+
+&ehci {
+ status = "okay";
+};
+
+&ohci {
+ status = "okay";
+};