add new target 'oxnas'

This is the oxnas target previously developed at
http://gitorious.org/openwrt-oxnas
Basically, this consolidates the changes and addtionas from
http://github.org/kref/linux-oxnas
into a new OpenWrt hardware target 'oxnas' adding support for
 PLX Technology NAS7820/NAS7821/NAS7825/...
formally known as
 Oxford Semiconductor OXE810SE/OXE815/OX820/...

For now there are 4 supported boards:
Cloud Engines Pogoplug V3 (without PCIe)
 fully supported

Cloud Engines Pogoplug Pro (with PCIe)
 fully supported

MitraStar STG-212
 aka ZyXEL NSA-212,
 aka Medion Akoya P89625 / P89636 / P89626 / P89630,
 aka Medion MD 86407 / MD 86805 / MD 86517 / MD 86587
 fully supported, see http://wiki.openwrt.org/toh/medion/md86587

Shuttle KD-20
 partially supported (S-ATA driver lacks support for 2nd port)

Signed-off-by: Daniel Golle <daniel@makrotopia.org>

SVN-Revision: 43388

1 files changed, 62 insertions, 0 deletions

diff --git a/target/linux/oxnas/patches-3.18/010-arm_introduce-dma-fiq-irq-broadcast.patch b/target/linux/oxnas/patches-3.18/010-arm_introduce-dma-fiq-irq-broadcast.patch
new file mode 100644
index 0000000000..fb7547f96b
--- /dev/null
+++ b/target/linux/oxnas/patches-3.18/010-arm_introduce-dma-fiq-irq-broadcast.patch
@@ -0,0 +1,62 @@
+Index: linux-3.18-rc4/arch/arm/include/asm/glue-cache.h
+===================================================================
+--- linux-3.18-rc4.orig/arch/arm/include/asm/glue-cache.h
++++ linux-3.18-rc4/arch/arm/include/asm/glue-cache.h
+@@ -156,11 +156,19 @@ static inline void nop_dma_unmap_area(co
+ #define __cpuc_flush_user_range		__glue(_CACHE,_flush_user_cache_range)
+ #define __cpuc_coherent_kern_range	__glue(_CACHE,_coherent_kern_range)
+ #define __cpuc_coherent_user_range	__glue(_CACHE,_coherent_user_range)
++#ifndef CONFIG_DMA_CACHE_FIQ_BROADCAST
+ #define __cpuc_flush_dcache_area	__glue(_CACHE,_flush_kern_dcache_area)
+ 
+ #define dmac_map_area			__glue(_CACHE,_dma_map_area)
+ #define dmac_unmap_area			__glue(_CACHE,_dma_unmap_area)
+ #define dmac_flush_range		__glue(_CACHE,_dma_flush_range)
++#else
++#define __cpuc_flush_dcache_area	__glue(fiq,_flush_kern_dcache_area)
++
++#define dmac_map_area			__glue(fiq,_dma_map_area)
++#define dmac_unmap_area			__glue(fiq,_dma_unmap_area)
++#define dmac_flush_range		__glue(fiq,_dma_flush_range)
++#endif /* CONFIG_DMA_CACHE_FIQ_BROADCAST */
+ #endif
+ 
+ #endif
+Index: linux-3.18-rc4/arch/arm/mm/Kconfig
+===================================================================
+--- linux-3.18-rc4.orig/arch/arm/mm/Kconfig
++++ linux-3.18-rc4/arch/arm/mm/Kconfig
+@@ -843,6 +843,17 @@ config DMA_CACHE_RWFO
+ 	  in hardware, other workarounds are needed (e.g. cache
+ 	  maintenance broadcasting in software via FIQ).
+ 
++config DMA_CACHE_FIQ_BROADCAST
++	bool "Enable fiq broadcast DMA cache maintenance"
++	depends on CPU_V6K && SMP
++	select FIQ
++	help
++	  The Snoop Control Unit on ARM11MPCore does not detect the
++	  cache maintenance operations and the dma_{map,unmap}_area()
++	  functions may leave stale cache entries on other CPUs. By
++	  enabling this option, fiq broadcast in the ARMv6
++	  DMA cache maintenance functions is performed.
++
+ config OUTER_CACHE
+ 	bool
+ 
+Index: linux-3.18-rc4/arch/arm/mm/flush.c
+===================================================================
+--- linux-3.18-rc4.orig/arch/arm/mm/flush.c
++++ linux-3.18-rc4/arch/arm/mm/flush.c
+@@ -314,7 +314,11 @@ void flush_dcache_page(struct page *page
+ 
+ 	mapping = page_mapping(page);
+ 
++#ifndef CONFIG_DMA_CACHE_FIQ_BROADCAST
+ 	if (!cache_ops_need_broadcast() &&
++#else
++	if (
++#endif
+ 	    mapping && !page_mapped(page))
+ 		clear_bit(PG_dcache_clean, &page->flags);
+ 	else {